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ATmega644PA Datasheet(PDF) 236 Page - ATMEL Corporation |
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ATmega644PA Datasheet(HTML) 236 Page - ATMEL Corporation |
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236 / 468 page ![]() 236 8152G–AVR–11/09 ATmega164PA/324PA/644PA/1284P • Bit 0 – TWIE: TWI Interrupt Enable When this bit is written to one, and the I-bit in SREG is set, the TWI interrupt request will be acti- vated for as long as the TWINT Flag is high. 20.9.3 TWSR – TWI Status Register • Bits 7:3 – TWS: TWI Status These 5 bits reflect the status of the TWI logic and the 2-wire Serial Bus. The different status codes are described ”Transmission Modes” on page 220. Note that the value read from TWSR contains both the 5-bit status value and the 2-bit prescaler value. The application designer should mask the prescaler bits to zero when checking the Status bits. This makes status check- ing independent of prescaler setting. This approach is used in this datasheet, unless otherwise noted. • Bit 2 – Res: Reserved Bit This bit is reserved and will always read as zero. • Bits 1:0 – TWPS: TWI Prescaler Bits These bits can be read and written, and control the bit rate prescaler. To calculate bit rates, see ”Bit Rate Generator Unit” on page 215. The value of TWPS1..0 is used in the equation. 20.9.4 TWDR – TWI Data Register In Transmit mode, TWDR contains the next byte to be transmitted. In Receive mode, the TWDR contains the last byte received. It is writable while the TWI is not in the process of shifting a byte. This occurs when the TWI Interrupt Flag (TWINT) is set by hardware. Note that the Data Regis- ter cannot be initialized by the user before the first interrupt occurs. The data in TWDR remains stable as long as TWINT is set. While data is shifted out, data on the bus is simultaneously shifted in. TWDR always contains the last byte present on the bus, except after a wake up from a sleep mode by the TWI interrupt. In this case, the contents of TWDR is undefined. In the case Bit 76543210 (0xB9) TWS7 TWS6 TWS5 TWS4 TWS3 – TWPS1 TWPS0 TWSR Read/Write RRRRRR R/W R/W Initial Value 11111000 Table 20-7. TWI Bit Rate Prescaler TWPS1 TWPS0 Prescaler Value 00 1 01 4 10 16 11 64 Bit 76543210 (0xBB) TWD7 TWD6 TWD5 TWD4 TWD3 TWD2 TWD1 TWD0 TWDR Read/Write R/W R/W R/W R/W R/W R/W R/W R/W Initial Value 11111111 |
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