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HT82B40R Datasheet(PDF) 31 Page - Holtek Semiconductor Inc |
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HT82B40R Datasheet(HTML) 31 Page - Holtek Semiconductor Inc |
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31 / 57 page ![]() HT82B40R/HT82B40A Rev. 1.10 31 September 4, 2009 There is a system clock control register implemented to select the clock used in the MCU. This register consists of the USB clock control bit, USBCKEN, second suspend mode control bit, SUSP2, and a system clock selection bit, SYSCLK. The PS2 mode indicate bit, PS2_flag, and a system clock adjust control bit, CLK_adj. Bit No. Label R/W Function 0, 1, 2 ¾¾ Reserved bit set ²0² 3 USBCKEN R/W USB clock control bit. When this bit is set to ²1², it indicates that the USB clock is en- abled. Otherwise, the USB clock is turned-off. (Default= ²0²) 4 SUSP2 ¾ When set to 1, turn-off Band-gap circuit. Default value is 0. In the Power-down Mode this bit should be set high to reduce power consumption.The LVR has no function. In the USB mode this bit cannot be set high. 5 PS2_flag R/W This flag is used to indicate that the MCUis in the PS2 mode. (Bit=1) This bit is R/W by FW and will be cleared to ²0² after power-on reset. (Default=²0²) 6 SYSCLK R/W This bit is used to specify the system oscillator frequency used by the MCU. If a 6MHz crystal oscillator or resonator is used, this bit should be set to ²1². If a 12MHz crystal oscillator or resonator is used, this bit should be cleared to ²0² (default). 7 CLK_adj R/W This bit is used to adjust the system clock for the USB mode for temperature changes. In the Power-down Mode this bit should be set high to reduce power consumption. 0: enable (default) 1: disable SCC (22H) Register STALL and PIPE, PIPE_CTRL, Endpt_EN Registers The PIPE register represents whether the corresponding endpoint is accessed by the host or not. After an ACT_EN sig- nal has been sent out, the MCU can check which endpoint had been accessed. This register is set only after the a time when the host is accessing the corresponding endpoint. The STALL register shows whether the corresponding endpoint works or not. As soon as the endpoint works improp- erly, the corresponding bit must be set. The PIPE_CTRL Register is used for configuring the IN (Bit=1) or OUT (Bit=0) Pipe. The default is define IN pipe. Bit0 (DATA0) of the PIPE_CTRL Register is used to set the data toggle of any endpoint (except endpoint 0) using data tog- gles to the value DATA0. Once the user wants any endpoint (except endpoint 0) using data toggles to the value DATA0. the user can output a LOW pulse to this bit. The LOW pulse period must at least 10 instruction cycles. The Endpt_EN Register is used to enable or disable the corresponding endpoint (except endpoint 0) Enable Endpoint (Bit=1) or disable Endpoint (Bit=0) The bitmaps are list are shown in the following table: Register Name R/W Register Address Bit7~Bit3 Reserved Bit 2 Bit 1 Bit 0 Default Value PIPE_CTRL R/W 01000001B ¾ Pipe 2 Pipe 1 DATA0 00000111 STALL R/W 01000011B ¾ Pipe 2 Pipe 1 Pipe 0 00000111 PIPE R 01000100B ¾ Pipe 2 Pipe 1 Pipe 0 00000000 Endpt_EN R/W 01000111B ¾ Pipe 2 Pipe 1 Pipe 0 00000111 PIPE_CTRL (41H), STALL (43H), PIPE (44H) and Endpt_EN (47H) Registers The USB_STAT Register (40H) is used to indicate the present USB signal state. Bit No. Function Read/Write Register Address 0 EOP R/W 01000000B 1 J_state R/W 2 K_state R/W 3 SE0 R/W 4 SE1 R/W 5~7 ¾¾ USB_STAT (40H) Register Table |
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