ST7533 datasheet(39/60 Pages) SITRONIX

39 / 60 page

ST7533

Ver 1.0

39/60

2003/07/21

Sleep Mode

This stops all operations in the LCD display system, and as long as there are no accesses from the MPU, the consumption

current is reduced to a value near the static current. The internal modes during sleep mode are as follows:

1. The oscillator circuit and the LCD power supply circuit are halted.

2. All liquid crystal drive circuits are halted, and the segment in common drive outputs output a VDD level.

Standby Mode

The duty LCD display system operations are halted and only the static drive system for the indicator continues to operate,

providing the minimum required consumption current for the static drive. The internal modes are in the following states during

standby mode.

1 The LCD power supply circuits are halted. The oscillator circuit continues to operate.

2 The duty drive system liquid crystal drive circuits are halted and the segment and common driver outputs output a VDD level.

The static drive system does not operate.

When a reset command is performed while in standby mode, the system enters sleep mode.

* When an external power supply is used, it is recommended that the functions of the external power supply circuit be stopped

when the power saver mode is started. For example, when the various levels of liquid crystal drive voltage are provided by

external resistive voltage dividers, it is recommended that a circuit be added in order to cut the electrical current flowing

through the resistive voltage divider circuit when the power saver mode is in effect. The ST7533 series chips have a liquid

crystal display blanking control terminal /DOF. This terminal enters an “L” state when the power saver mode is launched.

Using the output of /DOF, it is possible to stop the function of an external power supply circuit.

NOP

Non-OPeration Command

R/W

D7 D6 D5 D4 D3 D2 D1 D0

Test

This is a command for IC chip testing. Please do not use it. If the test command is used by accident, it can be cleared by

applying a “L” signal to the /RES input by the reset command or by using an NOP.

R/W

D7 D6 D5 D4 D3 D2 D1 D0

* Inactive bit

Note: The ST7533 maintain their operating modes until something happens to change them. Consequently, excessive external

noise, etc., can change the internal modes of the ST7533 . Thus in the packaging and system design it is necessary to

suppress the noise or take measure to prevent the noise from influencing the chip. Moreover, it is recommended that the

operati n g mo des be refreshed periodical l y to prevent t h e effe c t s of unanti c ip a t e d

noise.

ST7533 Datasheet(PDF) 39 Page - Sitronix Technology Co., Ltd.