DM9161BI datasheet(13/45 Pages) DAVICOM

13 / 45 page

DM9161BI

Industrial-grade 10/100 Mbps Fast Ethernet Physical Layer Single Chip Transceiver

Preliminary

Version: DM9161BI-12-DS-P01

July 16, 2008

7. Functional Description

The DM9161BI Fast Ethernet single chip transceiver,

providing the functionality as specified in IEEE 802.3u,

integrates a complete 100Base-TX module and a complete

10Base-T module. The DM9161BI provides a Media

Independent Interface (MII) as defined in the IEEE 802.3u

standard (Clause 22).

The DM9161BI performs all PCS (Physical Coding Sub

layer), PMA (Physical Media Access), TP-PMD (Twisted

Pair Physical Medium Dependent) sub layer, 10Base-T

Encoder/Decoder, and Twisted Pair Media Access Unit

(TPMAU) functions. Figure 7-1 shows the major functional

blocks implemented in the DM9161BI.

MII Interface

100Base-TX

Transmitter

100Base-TX

Transmitter

100Base-TX

Receiver

100Base-TX

Receiver

10Base-T

Tranceiver

10Base-T

Tranceiver

Carrier

Sense

Carrier

Sense

Collision

Detection

Collision

Detection

Auto

Negotiation

Auto

Negotiation

MII Serial

Management

Interface

MII Serial

Management

Interface

Auto MDIX

Figure 7-1

7.1 MII Interface

The DM9161B provides a Media Independent Interface (MII)

as defined in the IEEE 802.3u standard (Clause 22).

The purpose of the MII interface is to provide a simple, easy

to implement connection between the MAC Reconciliation

layer and the PHY. The MII is designed to make the

differences between various media transparent to the MAC

sub layer.

The MII consists of a nibble wide receive data bus, a nibble

wide transmit data bus, and control signals to facilitate data

transfers between the PHY and the Reconciliation layer.

•

TXD (transmit data) is a nibble (4 bits) of data that are

driven by the reconciliation sub layer synchronously with

respect to TXCLK. For each TXCLK period, which

TXEN is asserted, TXD (3:0) are accepted for

transmission by the PHY.

•

TXCLK (transmit clock) output to the MAC reconciliation

sub layer is a continuous clock that provides the timing

reference for the transfer of the TXEN, TXD, and TXER

signals.

•

TXEN (transmit enable) input from the MAC

reconciliation sub layer indicates that nibbles are being

presented on the MII for transmission on the physical

medium.

DM9161BI Datasheet(PDF) 13 Page - Davicom Semiconductor, Inc.

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