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LT3029IDE Datasheet(PDF) 15 Page - Linear Technology |
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LT3029IDE Datasheet(HTML) 15 Page - Linear Technology |
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15 / 20 page ![]() LT3029 15 3029f APPLICATIONS INFORMATION Thermal Considerations The LT3029’s power handling capability limits the maximum rated junction temperature (125°C, LT3029E/LT3029I/ LT3029MP or 150°C, LT3029H). Two components comprise the power dissipated by each channel: 1. Output current multiplied by the input/output voltage differential: (IOUT)(VIN – VOUT), and 2. GND pin current multiplied by the input voltage: (IGND)(VIN). Ground pin current is found by examining the GND Pin Current curves in the Typical Performance Characteristics section. Power dissipation for each channel equals the sum of the two components listed above. Total power dissipation for the LT3029 equals the sum of the power dissipated by each channel. The LT3029’s internal thermal shutdown circuitry protects both channels of the device if either channel experiences an overload or fault condition. Activation of the thermal shutdown circuitry turns both channels off. If the overload or fault condition is removed, both outputs are allowed to turn back on. For continuous normal conditions, do not exceed the maximum junction temperature rating of 125°C(LT3029E/LT3029I/LT3029MP)or150°C(LT3029H). Carefully consider all sources of thermal resistance from junction-to-ambient, including additional heat sources mounted in proximity to the LT3029. For surface mount devices, use the heat spreading capabilities of the PC board and its copper traces to accomplish heat sinking. Copper board stiffeners and plated through-holes can also spread the heat generated by power devices. The following tables list thermal resistance as a function of copper area in a fixed board size. All measurements were taken in still air on a four-layer FR-4 board with 1oz solid internal planes, and 2oz external trace planes with a total board thickness of 1.6mm. For further information on thermal resistance and using thermal information, refer to JEDEC standard JESD51, notably JESD51-12. Table 2. DE Package, 16-Lead DFN COPPER AREA THERMAL RESISTANCE (JUNCTION-TO-AMBIENT) TOPSIDE* BACKSIDE BOARD AREA 2500mm2 2500mm2 2500mm2 36°C/W 1000mm2 2500mm2 2500mm2 37°C/W 225mm2 2500mm2 2500mm2 38°C/W 100mm2 2500mm2 2500mm2 40°C/W *Device is mounted on topside. Table 3. MSE Package, 16-Lead MSOP COPPER AREA BOARD AREA THERMAL RESISTANCE (JUNCTION-TO-AMBIENT) TOPSIDE* BACKSIDE 2500mm2 2500mm2 2500mm2 35°C/W 1000mm2 2500mm2 2500mm2 36°C/W 225mm2 2500mm2 2500mm2 37°C/W 100mm2 2500mm2 2500mm2 39°C/W *Device is mounted on topside. The junction-to-case thermal resistance ( θJC), measured at the Exposed Pad on the back of the die, is 4.3°C/W for the DFN package, and 5°C/W to 10°C/W for the MSOP package. |
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