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LT3029IDE Datasheet(PDF) 17 Page - Linear Technology |
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LT3029IDE Datasheet(HTML) 17 Page - Linear Technology |
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17 / 20 page ![]() LT3029 17 3029f APPLICATIONS INFORMATION 22V. The output acts like an open circuit, and no current flows from the output. However, current flows in (but is limited by) the external resistor divider that sets the output voltage. The LT3029 incurs no damage if either ADJ pin is pulled above or below ground by 9V. If the input is left open circuit or grounded, the ADJ pins perform like an open circuit down to –1.5V, and then like a 1.2k resistor down to –9V when pulled below ground. When pulled above ground, the ADJ pins perform like an open circuit up to 0.5V, then like a 5.7k resistor up to 3V, then like a 1.8k resistor up to 9V. In situations where an ADJ pin connects to a resistor divider that would pull the pin above its 9V clamp volt- age if the output is pulled high, the ADJ pin input current must be limited to less than 5mA. For example, assume a resistor divider sets the regulated output voltage to 1.5V, and the output is forced to 20V. The top resistor of the resistor divider must be chosen to limit the current into the ADJ pin to less than 5mA when the ADJ pin is at 9V. The 11V difference between the OUT and ADJ pins divided by the 5mA maximum current into the ADJ pin yields a minimum top resistor value of 2.2k. In circuits where a backup battery is required, several different input/output conditions can occur. The output voltage may be held up while the input is either pulled to ground, pulled to some intermediate voltage or is left open-circuit. Current flow back into the output follows the curve shown in Figure 5. If either of the LT3029’s IN pins is forced below its cor- responding OUT pin, or the OUT pin is pulled above its corresponding IN pin, input current for that channel typi- cally drops to less than 2μA. This occurs if the IN pin is connected to a discharged (low voltage) battery, and either a backup battery or a second regulator circuit holds up the output. The state of that channel’s SHDN pin has no effect on the reverse output current if the output is pulled above the input. Figure 5. Reverse Output Current OUTPUT VOLTAGE (V) 3029 F05 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 TJ = 25°C VIN = 0V VADJ = VOUT IADJ FLOWS INTO ADJ PIN TO GND PIN IOUT FLOWS INTO OUT PIN TO IN PIN 0123 4 5 6789 IADJ IOUT |
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