LTC3857 datasheet(13/38 Pages) LINER

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LTC3857

3857fa

operaTion (Refer to the Functional Diagram)

selects535kHz.PlacingaresistorbetweenFREQandSGND

allowsthefrequencytobeprogrammedbetween50kHz

and900kHz,asshowninFigure10.

Aphase-lockedloop(PLL)isavailableontheLTC3857

tosynchronizetheinternaloscillatortoanexternalclock

source that is connected to the PLLIN/MODE pin. The

phasedetectoradjuststhevoltage(throughaninternal

lowpassfilter)oftheVCOinputtoaligntheturn-onof

controller1’sexternaltopMOSFETtotherisingedgeof

thesynchronizingsignal.Thus,theturn-onofcontroller2’s

externaltopMOSFETis180degreesoutofphasetothe

risingedgeoftheexternalclocksource.

TheVCOinputvoltageisprebiasedtotheoperatingfre-

quencysetbytheFREQpinbeforetheexternalclockis

applied.Ifprebiasedneartheexternalclockfrequency,

thePLLlooponlyneedstomakeslightchangestothe

VCOinputinordertosynchronizetherisingedgeofthe

externalclock’stotherisingedgeofTG1.Theabilityto

prebiastheloopfilterallowsthePLLtolock-inrapidly

withoutdeviatingfarfromthedesiredfrequency.

Thetypicalcapturerangeofthephase-lockedloopisfrom

approximately55kHzto1MHz,withaguaranteeoverall

manufacturingvariationstobebetween75kHzand850kHz.

Inotherwords,theLTC3857’sPLLisguaranteedtolock

toanexternalclocksourcewhosefrequencyisbetween

75kHzand850kHz.

ThetypicalinputclockthresholdsonthePLLIN/MODE

pinare1.6V(rising)and1.1V(falling).

PolyPhase® Applications (CLKOUT and PHASMD Pins)

TheLTC3857featurestwopins(CLKOUTandPHASMD)

thatallowothercontrollerICstobedaisy-chainedwith

theLTC3857inPolyPhaseapplications.Theclockoutput

signalontheCLKOUTpincanbeusedtosynchronize

additional power stages in a multiphase power supply

solutionfeedingasingle,highcurrentoutputormultiple

separateoutputs.ThePHASMDpinisusedtoadjustthe

phaseoftheCLKOUTsignalaswellastherelativephases

betweenthetwointernalcontrollers,assummarizedin

Table 1. The phases are calculated relative to the zero

degreesphasebeingdefinedastherisingedgeofthetop

gatedriveroutputofcontroller1(TG1).

Table 1

VPHASMD

CONTROLLER 2 PHASE

CLKOUT PHASE

GND

180°

60°

Floating

180°

90°

INTVCC

240°

120°

Output Overvoltage Protection

Anovervoltagecomparatorguardsagainsttransientover-

shootsaswellasothermoreseriousconditionsthatmay

overvoltagetheoutput.WhentheVFBpinrisesbymore

than10%aboveitsregulationpointof0.800V,thetop

MOSFETisturnedoffandthebottomMOSFETisturned

onuntiltheovervoltageconditioniscleared.

Power Good (PGOOD1 and PGOOD2) Pins

Each PGOOD pin is connected to an open drain of an

internalN-channelMOSFET.TheMOSFETturnsonand

pullsthePGOODpinlowwhenthecorrespondingVFBpin

voltageisnotwithin±10%ofthe0.8Vreferencevoltage.

ThePGOODpinisalsopulledlowwhenthecorresponding

RUNpinislow(shutdown).WhentheVFBpinvoltage

iswithinthe±10%requirement,theMOSFETisturned

offandthepinisallowedtobepulledupbyanexternal

resistortoasourcenogreaterthan6V.

Foldback Current

When the output voltage falls to less than 70% of its

nominallevel,foldbackcurrentlimitingisactivated,pro-

gressivelyloweringthepeakcurrentlimitinproportionto

theseverityoftheovercurrentorshort-circuitcondition.

Foldbackcurrentlimitingisdisabledduringthesoft-start

interval(aslongastheVFBvoltageiskeepingupwiththe

TRACK/SSvoltage).

Theory and Benefits of 2-Phase Operation

Whytheneedfor2-phaseoperation?Upuntilthe2-phase

family, constant-frequency dual switching regulators

operated both channels in phase (i.e., single phase

operation).Thismeansthatbothswitchesturnedonat

thesametime,causingcurrentpulsesofuptotwicethe

amplitudeofthoseforoneregulatortobedrawnfromthe

inputcapacitorandbattery.Theselargeamplitudecurrent

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