LTC3868IGN-1 datasheet(13/38 Pages) LINER

13 / 38 page

LTC3868-1

38681fb

operaTion (Refer to the Functional Diagram)

current comparator, IR, turns off the bottom external

MOSFETjustbeforetheinductorcurrentreacheszero,

preventingitfromreversingandgoingnegative.Thus,

thecontrollerisindiscontinuousoperation.

Inforcedcontinuousoperationorwhenclockedbyan

externalclocksourcetousethephase-lockedloop(see

Frequency Selection and Phase-Locked Loop section),

theinductorcurrentisallowedtoreverseatlightloads

or under large transient conditions. The peak inductor

currentisdeterminedbythevoltageontheITHpin,just

asinnormaloperation.Inthismode,theefficiencyatlight

loadsislowerthaninBurstModeoperation.However,

continuousoperationhastheadvantagesofloweroutput

voltagerippleandlessinterferencetoaudiocircuitry.In

forcedcontinuousmode,theoutputrippleisindependent

ofloadcurrent.

WhenthePLLIN/MODEpinisconnectedforpulse-skipping

mode,theLTC3868-1operatesinPWMpulse-skipping

mode at light loads. In this mode, constant frequency

operation is maintained down to approximately 1% of

designedmaximumoutputcurrent.Atverylightloads,the

currentcomparator,ICMP,mayremaintrippedforseveral

cyclesandforcetheexternaltopMOSFETtostayofffor

thesamenumberofcycles(i.e.,skippingpulses).The

inductorcurrentisnotallowedtoreverse(discontinuous

operation).Thismode,likeforcedcontinuousoperation,

exhibitslowoutputrippleaswellaslowaudionoiseand

reducedRFinterferencewhencomparedtoBurstMode

operation. It provides higher light load efficiency than

forcedcontinuousmode,butnotnearlyashighasBurst

Modeoperation.

Frequency Selection and Phase-Locked Loop

(FREQ and PLLIN/MODE Pins)

Theselectionofswitchingfrequencyisatradeoffbetween

efficiency and component size. Low frequency opera-

tionincreasesefficiencybyreducingMOSFETswitching

losses,butrequireslargerinductanceand/orcapacitance

tomaintainlowoutputripplevoltage.

TheswitchingfrequencyoftheLTC3868-1’scontrollers

canbeselectedusingtheFREQpin.

IfthePLLIN/MODEpinisnotbeingdrivenbyanexternal

clocksource,theFREQpincanbetiedtoSGND,tiedto

INTVCCorprogrammedthroughanexternalresistor.Tying

FREQtoSGNDselects350kHzwhiletyingFREQtoINTVCC

selects 535kHz. Placing a resistor between FREQ and

SGNDallowsthefrequencytobeprogrammedbetween

50kHzand900kHz.

Aphase-lockedloop(PLL)isavailableontheLTC3868-1

tosynchronizetheinternaloscillatortoanexternalclock

source that is connected to the PLLIN/MODE pin. The

phasedetectoradjuststhevoltage(throughaninternal

lowpassfilter)oftheVCOinputtoaligntheturn-onof

controller1’sexternaltopMOSFETtotherisingedgeof

thesynchronizingsignal.Thus,theturn-onofcontroller

2’sexternaltopMOSFETis180degreesoutofphaseto

therisingedgeoftheexternalclocksource.

TheVCOinputvoltageisprebiasedtotheoperatingfre-

quencysetbytheFREQpinbeforetheexternalclockis

applied.Ifprebiasedneartheexternalclockfrequency,

thePLLlooponlyneedstomakeslightchangestothe

VCOinputinordertosynchronizetherisingedgeofthe

externalclock’stotherisingedgeofTG1.Theabilityto

prebiastheloopfilterallowsthePLLtolock-inrapidly

withoutdeviatingfarfromthedesiredfrequency.

Thetypicalcapturerangeofthephase-lockedloopisfrom

approximately55kHzto1MHz,withaguaranteeoverall

manufacturingvariationstobebetween75kHzand850kHz.

Inotherwords,theLTC3868-1’sPLLisguaranteedtolock

toanexternalclocksourcewhosefrequencyisbetween

75kHzand850kHz.

ThetypicalinputclockthresholdsonthePLLIN/MODE

pinare1.6V(rising)and1.1V(falling).

Output Overvoltage Protection

Anovervoltagecomparatorguardsagainsttransientover-

shootsaswellasothermoreseriousconditionsthatmay

overvoltagetheoutput.WhentheVFBpinrisesbymore

than10%aboveitsregulationpointof0.800V,thetop

MOSFETisturnedoffandthebottomMOSFETisturned

onuntiltheovervoltageconditioniscleared.

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