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WM5615IP Datasheet(PDF) 3 Page - Wolfson Microelectronics plc |
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WM5615IP Datasheet(HTML) 3 Page - Wolfson Microelectronics plc |
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3 / 12 page ![]() WM5615 Wolfson Microelectronics 3 Resolution 10 bits Integral nonlinearity INL (see note 1) ±1 LSB Differential nonlinearity DNL (see note 2) +0.1 ±0.5 LSB Zero scale error (offset error) EZS (see note 3) ±3 LSB Zero scale error (offset error) (see note 4) 3 ppm/oC temperature coefficient Gain error EG (see note 5) ±3 LSB Gain error temperature (see note 6) 1 ppm/oC coefficient Power-supply rejection ratio PSRR Offset (see notes 7 and 8) 0.1 LSB/V Gain 0.1 Analogue full scale output RL = 100k Ω 2Vref(1023/1024) V Electrical Characteristics (over recommended operating free-air temperature range) VDD = 5.0V ±5%, Vref = 2.048V unless otherwise stated. PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNIT Static DAC Specifications Notes: 1. The relative accuracy or integral nonlinearity (INL), sometimes referred to as linearity error, is the maximum deviation ot the output from the line between zero and full scale, excluding the effect of zero code and full scale errors (see text). 2. The differential nonlinearity (DNL), sometimes referred to as differential error, is the difference between the measured and ideal LSB amplitude change of any two adjacent codes. Monotonic means the output voltage changes in the same direction (or remains constant) as a change in the digital input code. 3. Zero-scale error is the deviation from zero voltage output when the digital input is zero (see text) 4. Zero-scale error temperature coefficient is given by EZS TC = [EZS (Tmax) - EZS (Tmin)] /Vref x 106/ (Tmax- Tmin) Voltage Output (OUT) 5. Gain error is the deviation from the ideal output (Vref - 1LSB) with an output load of 10k Ω, excluding the effects of zero error. 6. Gain temperature coefficient is given by EG TC = [EG (Tmax) - EG (Tmin)] /Vref x 106/(Tmax-Tmin). 7. Zero-scale offset error rejection ratio (EZS-RR) is measured by varying the VDD from 4.5V to 5.5V DC and measuring the proportion of this signal imposed on the zero-code output voltage. 8. Gain error rejection ratio (EG-RR) is measured by varying the VDD from 4.5 to 5.5 V DC and measuring the proportion of this signal imposed on the full-scale output voltage after subtracting the zero scale change. PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNIT Voltage output range VO RL = 10k Ω 0VDD-0.4 V Output load regulation accuracy VO(OUT) = 2V RL=2k Ω 0.5 LSB Output short circuit current IOSC OUT to VDD or AGND 20 mA Output voltage, low level VOL(low) IO (OUT) <= 5mA 0.25 V Output voltage, high level VOH(high) IO (OUT) <= -5mA 4.75 V |
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