WM8170 datasheet(23/41 Pages) WOLFSON

23 / 41 page

WM8170

Product Preview Rev 1.0

WOLFSON MICROELECTRONICS LTD

PP Rev 1.0 March 2000

averaged error from all ADC conversions until the Analogue Black Level Correction circuitry is

enabled again. The calculated average is also used to preload the Digital IIR Filter, so that there are

no discontinuities in the correction value applied when the IIR Filter is enabled. For further details of

the operation of the Analogue Correction Loop, ANDUR and DIGDUR, refer to the Basic DC

Correction Mode section.

The IIR Filter allows the WM8170 to track relatively slow changes in the input video DC content

across a single frame of input video. The main advantage of the IIR Filter approach is to allow the

number of pixels over which the digital correction value is calculated to be much larger than the

number of black pixels available on a single line. This results in a stable correction value that does

not vary on a line to line basis due to the RMS noise during the black pixels.

The WM8170 also contains a second Pulse Generator that can be programmed to complement

either the Analogue Loop Enable or the IIR Filter Enable as required.

ENABLING THE HD AND VD INPUTS TO THE WM8170

To enable the use of all the Black Level Control Circuitry within the WM8170, both the Vertical Drive

(VD) and the Horizontal Drive (HD) control signals are required from the CCD Timing Generator

device. There are two dual mode pins on the WM8170 which are programmed via the Management

Interface register bits ENVD and ENHD. Details of the dual mode pins are covered in the Tables 3

and 4:

ENVD

FUNCTION

Pin 30 is PDB (Power Down Bar) Input

Pin 30 is VD (Vertical Drive) Input

Table 3 ENVD control bit operation

ENHD

FUNCTION

Pin 26 is PBLK (Video Blocking) Input

Pin 26 is HD (Horizontal Drive) Input

Table 4 ENHD control bit operation

When ENVD is set, PDB is held high internally in the WM8170. The Power Down Function remains

available via the Management Interface. When ENVD is reset, the internal circuitry requiring Vertical

Drive will not function.

When ENHD is set, PBLK is held high internally in the WM8170. The Video Blocking function is not

available in this mode. When ENHD is reset, the internal circuitry requiring Horizontal Drive will not

function.

INTERNAL BLACK LEVEL CLAMP ENABLE

The control for the Analogue Correction Loop can be programmed to be either the BLCENB pin, or

the INTBLCENB signal under control of the register bit ENINTBLC. To benefit from the extended

Black Level Control Circuitry within the WM8170 this bit must be set. Table 5 shows the operation of

the ENINTBLC control bit.

ENINTBLC

FUNCTION

Analogue Loop Enable is controlled by BLCENB pin directly.

Analogue Black Level Enable is controlled by the signals generated

by the INTBLCENB Pulse Generator.

Table 5 ENINTBLC control bit operation

WM8170 Datasheet(PDF) 23 Page - Wolfson Microelectronics plc

WM8170 Datasheet(HTML) 23 Page - Wolfson Microelectronics plc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41

Datasheet Download

Link URL