SS8018 datasheet(13/14 Pages) SSC

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Figure 4. SMBus Write Timing Diagram

A = start condition

H = LSB of data clocked into slave

B = MSB of address clocked into slave

I = slave pulls SMBDATA line low

C = LSB of address clocked into slave

J = acknowledge clocked into master

D = R/W bit clocked into slave

K = acknowledge clocked pulse

E = slave pulls SMBDATA line low

L = stop condition data executed by slave

F = acknowledge bit clocked into master

M = new start condition

G = MSB of data clocked into slave

Figure 5. SMBus Read Timing Diagram

A = start condition

G = MSB of data clocked into master

B = MSB of address clocked into slave

H = LSB of data clocked into master

C = LSB of address clocked into slave

I = acknowledge clocked pulse

D = R/ W bit clocked into slave

J = stop condition

E = slave pulls SMBDATA line low

K= new start condition

F =acknowledge bit clocked into master

SMBCLK

SMBDATA

E F

SU:STA tHD:STA

SU:DAT

HD:DAT

SU:STO

BUF

LOW

HIGH

SMBCLK

SMBDATA

E F

SU:STA tHD:STA

SU:DAT

SU:STO

BUF

LOW

HIGH

SMBCLK

SMBDATA

E F

SU:STA tHD:STA

SU:DAT

SU:STO

BUF

LOW

HIGH

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SS8018

Rev.2.01 6/06/2003

SS8018 Datasheet(PDF) 13 Page - Silicon Standard Corp.

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