| Electronic Components Datasheet Search |
|
PAM1707BZKB4 Datasheet(PDF) 22 Page - Texas Instruments |
|
|
|||||||||||||||||||||||||||||
PAM1707BZKB4 Datasheet(HTML) 22 Page - Texas Instruments |
|
22 / 155 page ![]() AM1705 SPRS657A – FEBRUARY 2010 – REVISED APRIL 2010 www.ti.com Table 3-11. Boot Terminal Functions (1) (continued) PIN NO SIGNAL NAME TYPE(2) PULL(3) MUXED DESCRIPTION PTP McASP0, EMAC, AHCLKR0/RMII_MHZ_50_CLK/GP2[14]/BOOT[11] 129 I IPD BOOT[11]. GPIO AFSX0/GP2[13]/BOOT[10] 127 I IPD McASP0, GPIO BOOT[10]. UART0, I2C0, Timer0, UART0_TXD/I2C0_SCL/TM64P0_OUT12/GP5[9]/BOOT[9] 3 I IPU BOOT[9]. GPIO UART0, I2C0, Timer0, UART0_RXD/I2C0_SDA/TM64P0_IN12/GP5[8]/BOOT[8] 2 I IPU BOOT[8]. GPIO SPI1_CLK/EQEP1S/GP5[7]/BOOT[7] 16 I IPD SPI1, eQEP1, GPIO BOOT[7]. SPI1_SIMO[0]/I2C1_SDA/GP5[6]/BOOT[6] 14 I IPU BOOT[6]. SPI1, I2C1, GPIO SPI1_SOMI[0]/I2C1_SCL/GP5[5]/BOOT[5] 13 I IPU BOOT[5]. SPI0, UART0, SPI0_SCS[0]/UART0_RTS/EQEP0B/GP5[4]/BOOT[4] 9 I IPU BOOT[4]. eQEP0, GPIO SPI0, UART0, SPI0_ENA/UART0_CTS/EQEP0A/GP5[3]/BOOT[3] 12 I IPU BOOT[3]. eQEP0, GPIO SPI0_CLK/EQEP1I/GP5[2]/BOOT[2] 11 I IPD SPIO, eQEP1, GPIO BOOT[2]. SPI0_SIMO[0]/EQEP0S/GP5[1]/BOOT[1] 18 I IPD BOOT[1]. SPI0, eQEP0, GPIO SPI0_SOMI[0]/EQEP0I/GP5[0]/BOOT[0] 17 I IPD BOOT[0]. 3.6.10 Universal Asynchronous Receiver/Transmitters (UART0, UART1, UART2) Table 3-12. Universal Asynchronous Receiver/Transmitter (UART) Terminal Functions PIN NO SIGNAL NAME TYPE(1) PULL(2) MUXED DESCRIPTION PTP UART0 I2C0, BOOT, UART0 receive UART0_RXD/I2C0_SDA/TM64P0_IN12/GP5[8]/BOOT[8] 2 I IPU Timer0, GPIO, data. I2C0, Timer0, UART0 transmit UART0_TXD/I2C0_SCL/TM64P0_OUT12/GP5[9]/BOOT[9] 3 O IPU GPIO, BOOT data. UART0 SPI0_SCS[0]/ UART0_RTS /EQEP0B/GP5[4]/BOOT[4] 9 O IPU ready-to-send SPIO, eQEP0, output GPIO, BOOT UART0 SPI0_ENA/ UART0_CTS /EQEP0A/GP5[3]/BOOT[3] 12 I IPU clear-to-send input UART1 UART1 receive UART1_RXD/AXR0[9]/GP3[9](3) 122 I IPD data. McASP0, GPIO UART1 transmit UART1_TXD/AXR0[10]/GP3[10](3) 123 O IPD data. UART2 UART2 receive SPI1_ENA/UART2_RXD/GP5[12] 7 I IPU data. SPI1, GPIO UART2 transmit SPI1_SCS[0]/UART2_TXD/GP5[13] 8 O IPU data. (1) I = Input, O = Output, I/O = Bidirectional, Z = High impedance, PWR = Supply voltage, GND = Ground, A = Analog signal. Note: The pin type shown refers to the input, output or high-impedance state of the pin function when configured as the the signal name highlighted in bold. All multiplexed signals may enter a high-impedance state when the configured function is input-only or the configured function supports high-Z operation. All GPIO signals can be used as input or output. For multiplexed pins where functions have different types (ie., input versus output), the table reflects the pin function direction for that particular peripheral. (2) IPD = Internal Pulldown resistor, IPU = Internal Pullup resistor (3) As these signals are internally pulled down while the device is in reset, it is necessary to externally pull them high with resistors if UART1 boot mode is used. 22 Device Overview Copyright © 2010, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): AM1705 |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |