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74HC73 Datasheet(PDF) 6 Page - NXP Semiconductors

Part # 74HC73
Description  Dual JK flip-flop with reset; negative-edge trigger
PDF  16 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

74HC73 Datasheet(HTML) 6 Page - NXP Semiconductors

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74HC73_4
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 04 — 19 March 2008
6 of 16
NXP Semiconductors
74HC73
Dual JK flip-flop with reset; negative-edge trigger
10. Dynamic characteristics
Table 7.
Dynamic characteristics
GND (ground = 0 V); CL = 50 pF unless otherwise specified; for test circuit, see Figure 8
Symbol
Parameter
Conditions
25
°C
−40 °C to +85 °C −40 °C to +125 °C Unit
Min Typ Max
Min
Max
Min
Max
tpd
propagation
delay
nCP to nQ; see Figure 6
[1]
VCC = 2.0 V
-
52
160
-
200
-
240
ns
VCC = 4.5 V
-
19
32
-
40
-
48
ns
VCC = 6.0 V
-
15
27
-
34
-
41
ns
VCC = 5.0 V; CL = 15 pF
-
16
-
-
-
-
-
ns
nCP to nQ; see Figure 6
VCC = 2.0 V
-
52
160
-
200
-
240
ns
VCC = 4.5 V
-
19
32
-
40
-
48
ns
VCC = 6.0 V
-
15
27
34
-
41
ns
VCC = 5.0 V; CL = 15 pF
-
16
-
-
ns
nR to nQ, nQ; see Figure 7
VCC = 2.0 V
-
50
145
-
180
-
220
ns
VCC = 4.5 V
-
18
29
-
36
-
44
ns
VCC = 6.0 V
-
14
25
31
-
38
ns
VCC = 5.0 V; CL = 15 pF
-
15
-
-
-
-
-
ns
tt
transition time nQ, nQ; see Figure 6
[2]
VCC = 2.0 V
-
19
75
-
95
-
110
ns
VCC = 4.5 V
-
7
15
-
19
-
22
ns
VCC = 6.0 V
-
6
13
16
-
19
ns
tW
pulse width
nCP input, HIGH or LOW;
see Figure 6
VCC = 2.0 V
80
22
-
100
120
-
ns
VCC = 4.5 V
16
8
-
20
-
24
-
ns
VCC = 6.0 V
14
6
-
17
-
20
ns
nR input, HIGH or LOW;
see Figure 7
VCC = 2.0 V
80
22
-
100
120
-
ns
VCC = 4.5 V
16
8
-
20
-
24
-
ns
VCC = 6.0 V
14
6
-
17
-
20
ns
trec
recovery time
nR to nCP; see Figure 7
VCC = 2.0 V
80
22
-
100
120
-
ns
VCC = 4.5 V
16
8
-
20
-
24
-
ns
VCC = 6.0 V
14
6
-
17
-
20
ns
tsu
set-up time
nJ, nK to nCP; see Figure 6
VCC = 2.0 V
80
22
-
100
120
-
ns
VCC = 4.5 V
16
8
-
20
-
24
-
ns
VCC = 6.0 V
14
6
-
17
-
20
ns



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