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74HC258DB Datasheet(PDF) 1 Page - NXP Semiconductors |
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74HC258DB Datasheet(HTML) 1 Page - NXP Semiconductors |
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1 / 14 page ![]() 1. General description The 74HC258 is a high-speed Si-gate CMOS device and is pin compatible with low power Schottky TTL (LSTTL). The 74HC258 is specified in compliance with JEDEC standard no. 7A. The 74HC258 has four identical 2-input multiplexers with 3-state outputs, which select 4 bits of data from two sources and is controlled by a common data select input (S). The data inputs from source 0 (1I0 to 4I0) are selected when input S is LOW and the data inputs from source 1 (1I1 to 4I1) are selected when S is HIGH. Data appears at the outputs (1Yto4Y) in inverted form from the select inputs. The 74HC258 is the logic implementation of a 4-pole, 2-position switch, where the position of the switch is determined by the logic levels applied to S. The outputs are forced to a high-impedance OFF-state when OE is HIGH. The logic equations for the outputs are: The 74HC258 is identical to the 74HC257 but has inverting outputs. 2. Features I 3-state outputs interface directly with system bus I Low-power dissipation I Inverting data path I Complies with JEDEC standard no. 7A I ESD protection: N HBM JESD22-A114E exceeds 2000 V N MM JESD22-A115-A exceeds 200 V I Multiple package options I Specified from −40 °Cto+85 °C and from −40 °C to +125 °C. 74HC258 Quad 2-input multiplexer; 3-state; inverting Rev. 04 — 14 April 2008 Product data sheet 1Y OE 1I1 S × 1I0 S × + () × = 2Y OE 2I1 S × 2I0 S × + () × = 3Y OE 3I1 S × 3I0 S × + () × = 4Y OE 4I1 S × 4I0 S × + () × = |
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