74LVC595A_1

© NXP B.V. 2007. All rights reserved.

Product data sheet

Rev. 01 — 29 May 2007

10 of 19

NXP Semiconductors

74LVC595A

8-bit serial-in/serial-out or parallel-out shift register; 3-state

12. Waveforms

Measurement points are given in Table 8.

Fig 7.

The shift clock (SHCP) to serial data output (Q7S) propagation delays, the shift clock pulse width and

maximum shift clock frequency

mna557

SH

CP input

Q

7S output

GND

Measurement points are given in Table 8.

Fig 8.

The storage clock (STCP) to parallel data output (Qn) propagation delays, the storage clock pulse width

and the shift clock to storage clock set-up time

mna558

ST

CP input

Q

n output

GND

SH

CP input

GND