ADC1010S datasheet(13/36 Pages) NXP

13 / 36 page

ADC1010S_SER_1

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Preliminary data sheet

Rev. 01 — 9 April 2010

13 of 36

NXP Semiconductors

ADC1010S series

ADC1010S series; CMOS or LVDS DDR digital outputs

When the device enters SPI control mode, the output data standard and data format are

determined by the level on pin SDIO at the instant a transition is triggered by a falling

edge on CS.

11.1.2 Operating mode selection

The active ADC1010S operating mode (Power-up, Power-down or Sleep) can be selected

via the SPI interface (see Table 20) or using pins PWD and OE in Pin control mode, as

described in Table 10.

11.1.3 Selecting the output data standard

The output data standard (CMOS or LVDS DDR) can be selected via the SPI interface

(see Table 23) or using pin ODS in Pin control mode. LVDS DDR is selected when ODS is

HIGH, otherwise CMOS is selected.

11.1.4 Selecting the output data format

The output data format can be selected via the SPI interface (offset binary, two’s

complement or gray code; see Table 23) or using pin DFS in Pin control mode (offset

binary or two’s complement). Offset binary is selected when DFS is LOW. When DFS is

HIGH, two’s complement is selected.

11.2 Analog inputs

11.2.1 Input stage

The analog input of the ADC1010S supports differential or single-ended input drive.

Optimal performance is achieved using differential inputs with the common-mode input

voltage (VI(cm)) on pins INP and INM set to 0.5VDDA.

The full-scale analog input voltage range is configurable between 1 V (p-p) and 2 V (p-p)

via a programmable internal reference (see Section 11.3 and Table 22 further details).

The equivalent circuit of the sample and hold input stage, including Electrostatic

Discharge (ESD) protection and circuit and package parasitics, is shown in Figure 8.

Fig 7.

Control mode selection

R/W

SPI control mode

Pin control mode

Data format

offset binary

Data format

two's complement

LVDS DDR

SDIO/ODS

SCLK/DFS

A12

005aaa039

CMOS

Table 10.

Operating mode selection via pin PWD and OE

Pin PWD

Pin OE

Operating mode

Output high-Z

Power-up

yes

Sleep

yes

Power-down

yes

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