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Features

Proper sequencing is ensured in the design with the use of a NPN transistor and a N-channel MOSFET.

As required, Core 1.2 V at 600 mA comes first , which in turn pulls up the gate of a N-channel MOSFET to

3.3 V with the use of a NPN transistor. Then 1.2 V + VRTC at 251 mA comes up. This 1.2 V further

enables the DCDC1 and sequentially 1.8 V comes up, which again enables an LDO to give 3.3 V at 115

mA.

(1)

Use three such LDOs to power up DVDDA, DVDDB, and DVDDC. (It can be either 1.8 V or 3.3 V.)

(2)

Rx = 0.499 M

Ω, Ry = 1 MΩ for Vout = 1.8 V

(3)

Rx = 1.8 M

Ω, Ry = 1 MΩ for Vout = 3.3 V

(4)

For proper sequencing of output, enable of the LDOs are fed either from a 1.2-V output from TPS62420

DCDC2 if DVDDX is 1.8 V or from a 1.8-V output from TPS62420 DCDC1 if DVDDX is 3.3 V.

Figure 2. Optional Circuit for DVDD_A, DVDD_B and DVDD_C

5

SLVA343A – June 2009 – Revised May 2010

Medium Integrated Power Solution Using a Dual DC/DC Converter and an LDO

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