MIC2156 datasheet(33/35 Pages) MICREL

33 / 35 page

Micrel, Inc.

MIC2155/2156

November 2009

M9999-111209-B

200

100

-100

-200

FREQUENCY

100

10k 100k

Gain

Phase

fZERO = 10kHz

fC = 50kHz

Phase margin = 80°

134.17466

-179.9424

bb(f)

Figure 29. Compensated Current Sharing Loop Gain/Phase

General Layout and Component Placement

There are three basic types of currents in a switching

power supply – high di/dt, moderate di/dt and DC.

Examples of each are shown in Figure 30.

Figure 30. Current Diagram

In a buck converter, high di/dt currents in the 0.5A/ns

range are generated by MOSFETs switching on and off.

These fast switching currents flow in the high and low-

side MOSFETs, external freewheeling schottky diode

and the input capacitor. Fast switching currents also flow

in the gate drive and return etch between the controller

and the power FETs. At that switching speed at 10nH

piece of etch generates 5V across itself. Therefore,

attention to proper layout techniques is essential. Traces

that have high di/dt currents must be kept short and

wide. Additionally a power ground plane should be used

on an adjacent layer to help minimize etch inductance.

Figure 31 shows a layout example that minimizes

inductance.

Figure 31. Layout

Moderate di/dt currents flow in the inductor and output

capacitor. Although layout is not as critical, it is still

important to minimize inductance by using short, wide

traces and a ground plane. Figure 31 shows the etch

connecting the inductor to the output is shaped to force

current to flow past the output capacitor before reaching

the output terminal (or output load). This minimizes the

series inductance between the inductor and the

capacitor, which improves the ability of the capacitor to

filter ripple. Additionally, the inductor current has a large

DC component and requires a wide trace to minimize

voltage drop and power dissipation.

DC currents in a high-current buck converter require

wide etch paths to minimize voltage drop and power

dissipation. The input and output current are mainly DC.

At or near maximum output power, the inductor current

is also predominately DC and requires ample etch to

reduce copper loss, reduce temperature rise and

improve efficiency. Minimizing voltage drops in the

output and ground path helps improve output voltage

regulation for configurations without remote voltage

sensing.

The gate drive connections to both the high-side and

low-side MOSFETs must each have their own return

current path. The high-side MOSFET’s source is

connected to the switch node and returns back to the

controller’s SW1 or SW2 pin. The high-side gate drive

and return (switch node) traces should be routed on top

of each other on adjacent layers to minimize inductance.

These traces swing between VIN and ground and should

be routed away from low-voltage and noise-sensitive

analog etch or components. The low-side MOSFET

return path is power ground. High di/dt currents flow in

the low-side gate drive and return paths. These must be

kept away from noise sensitive signal traces and signal

ground planes.

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