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P89LPC913FDH Datasheet(PDF) 33 Page - NXP Semiconductors |
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P89LPC913FDH Datasheet(HTML) 33 Page - NXP Semiconductors |
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33 / 66 page ![]() P89LPC912_913_914_5 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 05 — 28 September 2007 33 of 66 NXP Semiconductors P89LPC912/913/914 8-bit microcontrollers with two-clock 80C51 core 8.12 I/O ports The P89LPC912 and P89LPC913 devices have 4 I/O ports: Port 0, Port 1, Port 2 and Port 3. The exact number of I/O pins available depends on the clock and reset options chosen, as shown in Table 10. Fig 13. Interrupt sources, interrupt enables, and power-down wake-up sources (P89LPC912) EA (IE0.7) EC CMF1 CMF2 TF0 ET0 SPIF ESPI BOF EBO KBIF EKBI TF1 ET1 002aaa484 RTCF ERTC (RTCCON.1) WDOVF EWDRT wake-up (if in power-down) interrupt to CPU Fig 14. Interrupt sources, interrupt enables, and power-down wake-up sources (P89LPC913, P89LPC914) EA (IE0.7) EC CMF1 CMF2 BOF EBO KBIF EKBI 002aaa485 TF0 ET0 TF1 ET1 ES/ESR TI and RI/RI TI EST SPIF ESPI RTCF ERTC (RTCCON.1) WDOVF EWDRT wake-up (if in power-down) interrupt to CPU |
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