PCA9538_5

© NXP B.V. 2009. All rights reserved.

Product data sheet

Rev. 05 — 28 May 2009

5 of 28

NXP Semiconductors

PCA9538

6.

Functional description

Refer to Figure 1 “Block diagram of PCA9538”.

6.1 Device address

6.2 Registers

6.2.1 Command byte

The command byte is the first byte to follow the address byte during a write transmission.

It is used as a pointer to determine which of the registers will be written or read.

6.2.2 Register 0 - Input Port register

This register is a read-only port. It reflects the incoming logic levels of the pins, regardless

of whether the pin is defined as an input or an output by Register 3. Writes to this register

have no effect.

The default value ‘X’ is determined by the externally applied logic level.

Fig 5.

PCA9538 address

R/W

002aae707

1

1

1

0

0

A1

A0

slave address

fixed

hardware

selectable

Table 3.

Command byte

Command

Protocol

Function

0

read byte

Input Port register

1

read/write byte

Output Port register

2

read/write byte

Polarity Inversion register

3

read/write byte

Configuration register

Table 4.

Register 0 - Input Port register bit description

Legend: * default value.

Bit

Symbol

Access

Value

Description

7

I7

read only

X*

value ‘X’ is determined by externally applied

logic level

6

I6

read only

X*

5

I5

read only

X*

4

I4

read only

X*

3

I3

read only

X*

2

I2

read only

X*

1

I1

read only

X*

0

I0

read only

X*