PCA9538D datasheet(10/28 Pages) NXP

10 / 28 page

PCA9538_5

Product data sheet

Rev. 05 — 28 May 2009

10 of 28

NXP Semiconductors

PCA9538

8-bit I2C-bus and SMBus low power I/O port with interrupt and reset

Fig 9.

Read from register

START condition

R/W

acknowledge

from slave

002aae710

acknowledge

from slave

SDA

acknowledge

from master

DATA (first byte)

slave address

STOP

condition

(repeated)

START condition

(cont.)

1100

A1 A0

R/W

acknowledge

from slave

slave address

at this moment master-transmitter becomes master-receiver

and slave-receiver becomes slave-transmitter

no acknowledge

from master

COMMAND BYTE

1100

A1 A0

data from register

DATA (last byte)

data from register

This ﬁgure assumes the command byte has previously been programmed with 00h.

Transfer of data can be stopped at any moment by a STOP condition.

Expanded diagram is shown in Figure 17.

Fig 10. Read input port register

1100

A1 A0

slave address

START condition

R/W

acknowledge

from slave

002aae711

data from port

acknowledge

from master

SDA

no acknowledge

from master

read from

port

data into

port

data from port

DATA 1

DATA 4

INT

DATA 4

DATA 2

DATA 3

STOP

condition

tv(INT)

trst(INT)

th(D)

tsu(D)

12345678

SCL

DATA 1

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