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PCA9557D Datasheet(PDF) 13 Page - NXP Semiconductors |
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PCA9557D Datasheet(HTML) 13 Page - NXP Semiconductors |
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13 / 26 page ![]() PCA9557 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 06 — 11 June 2008 13 of 26 NXP Semiconductors PCA9557 8-bit I2C-bus and SMBus I/O port with reset 9. Application design-in information 9.1 Minimizing IDD when the I/Os are used to control LEDs When the I/Os are used to control LEDs, they are normally connected to VDD through a resistor as shown in Figure 18. Since the LED acts as a diode, when the LED is off the I/O VI is about 1.2 V less than VDD. The supply current, IDD, increases as VI becomes lower than VDD. Designs needing to minimize current consumption, such as battery power applications, should consider maintaining the I/O pins greater than or equal to VDD when the LED is off. Figure 19 shows a high value resistor in parallel with the LED. Figure 20 shows VDD less than the LED supply voltage by at least 1.2 V. Both of these methods maintain the I/O VI at or above VDD and prevents additional supply current consumption when the LED is off. Device address configured as 0011 100x for this example. IO0, IO2, IO3 configured as outputs. IO1, IO4, IO5 configured as inputs. IO6, IO7 are not used. Fig 18. Typical application PCA9557 IO0 IO1 SCL SDA VDD 002aad285 SCL SDA IO2 IO3 VDD VSS MASTER CONTROLLER VSS VDD (5 V) 620 Ω SUBSYSTEM 1 (e.g., temp. sensor) INT SUBSYSTEM 2 (e.g., counter) RESET controlled switch (e.g., CBT device) A B enable RESET RESET 2 k Ω 2 k Ω SUBSYSTEM 3 (e.g., alarm system) ALARM IO4 IO5 VDD A2 A1 A0 IO6 IO7 100 k Ω ( × 5) 1.8 k Ω 1.8 k Ω |
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