PEMD48_PUMD48_5

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Product data sheet

Rev. 05 — 13 April 2010

3 of 12

NXP Semiconductors

PEMD48; PUMD48

NPN/PNP resistor-equipped transistors

5.

Limiting values

[1]

Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated and standard

footprint.

[2]

Reflow soldering is the only recommended soldering method.

Table 6.

Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134).

Symbol

Parameter

Conditions

Min

Max

Unit

Per transistor; for the PNP transistor with negative polarity

collector-base voltage

open emitter

-

50

V

collector-emitter voltage

open base

-

50

V

emitter-base voltage

open collector

-

10

V

input voltage TR1

positive

-

+40

V

negative

-

−10

V

input voltage TR2

positive

-

+5

V

negative

-

−12

V

output current

-

100

mA

peak collector current

-

100

mA

total power dissipation

PEMD48 (SOT666)

[1][2] -200

mW

PUMD48 (SOT363)

[1] -200

mW

Per device

total power dissipation

PEMD48 (SOT666)

[1][2] -300

mW

PUMD48 (SOT363)

[1] -300

mW

junction temperature

-

150

°C

ambient temperature

−65

+150

°C

storage temperature

−65

+150

°C