Si5366 datasheet(11/50 Pages) SILABS

11 / 50 page

Si5317

Preliminary Rev. 0.15

LVCMOS Output Pins

Rise/Fall Times

tRF

CLOAD = 20 pf

See Figure 2

—25

—

LOSn Trigger Window

LOSTRIG From LVST CKIN to LOS

—750

µs

Time to Clear LOS Alarm

tLOSCLR

Measured from appearance

of valid CKIN to

of LOS

alarm

—

220

Time to Clear LOL after LOS Cleared

tCLRLOL

fin unchanged and XA/XB

stable.

LOS to  LOL

—10

—

PLL Performance

Lock Time

tLOCKHW RST with valid CKIN to 

LOL; BW = 100 Hz

—

1.2

sec

Closed Loop Jitter Peaking

JPK

—

0.05

0.1

Jitter Tolerance

JTOL

BW determined by

BWSEL[1:0]

5000/

—

ns pk-

Minimum Reset Pulse Width

tRSTMIN

1—

—

µs

Lock Time

tLOCKMP

Reset b

 to  of LOL

—

1000

Spurious Noise

SPSPUR

Max spur @ n x f3

(n > 1, n x f3 < 100 MHz)

——

–75

dBc

Table 4. AC Characteristics (Continued)

(VDD = 1.8 ±5%, 2.5 ±10%, or 3.3 V ±10%, TA = –40 to 85 ºC)

Parameter

Symbol

Test Condition

Min

Typ

Max

Units

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