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SC18IS601IPW Datasheet(PDF) 21 Page - NXP Semiconductors |
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SC18IS601IPW Datasheet(HTML) 21 Page - NXP Semiconductors |
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21 / 30 page  SC18IS600_601_5 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 05 — 28 July 2008 21 of 30 NXP Semiconductors SC18IS600/601 SPI to I2C-bus interface Fig 22. SPI slave timing (Mode 3) TCLCL tSCLKL tSCLKH tSPILEAD tSPILAG tSPIDSU tSPIDH tSPIDH tSPIDSU tSPIF tSPIA tSPIOH tSPIDIS slave MSB/LSB out not defined MSB/LSB in LSB/MSB in slave LSB/MSB out tSPIDV tSPIF CS 002aab797 SCLK (input) MISO (output) MOSI (input) tSPIDSU tSPIR tSPIR tSPIOH tSPIDV tSPIOH tSPIDV Fig 23. External clock timing tCHCL tCLCX tCHCX TCLCL tCLCH 002aab886 0.2VDD + 0.9 V 0.2VDD − 0.1 V VDD − 0.5 V 0.45 V |
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