TUSB9260

SLLS962 – DECEMBER 2009

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2.4

Terminal Descriptions

Table 2-1. Clock and Reset Signals

TERMINAL

I/O

DESCRIPTION

NAME

NO.

Global power reset. This reset brings all of the TUSB9260 internal registers to their default states.

GRSTN

I/O

When GRSTN is asserted, the device is completely nonfunctional.

Crystal input. This terminal is the crystal input for the internal oscillator. The input may alternately be

XI

I

driven by the output of an external oscillator. When using a crystal a 1-M

Ω feedback resistor is

required between X1 and XO.

Crystal output. This terminal is the crystal output for the internal oscillator. If XI is driven by an

XO

O

external oscillator this pin may be left unconnected. When using a crystal a 1-M

Ω feedback resistor

is required between X1 and XO.

Frequency select. These terminals indicate the oscillator input frequency and used to configure the

correct PLL multiplier. The field encoding is as follows:

00b 20 MHz

FREQSEL[1:0]

I

01b 25 MHz

10b 30 MHz

11b 40 MHz

Table 2-2. USB signals

TERMINAL

I/O

DESCRIPTION

NAME

NO.

USB_SSTXP

O

USB SuperSpeed transmitter differential pair (positive)

USB_SSTXM

O

USB SuperSpeed transmitter differential pair (negative)

USB_SSRXP

I

USB SuperSpeed receiver differential pair (positive)

USB_SSRXM

I

USB SuperSpeed receiver differential pair (negative)

USB_DP

I/O

USB High-speed differential transceiver (positive)

USB_DM

I/O

USB High-speed differential transceiver (negative)

USB_VBUS

I

USB bus power

USB_R1

I

Precision resistor reference. A 10K +/- 1% resistor should be connected between R1 and R2.

USB_R2

I

Precision resistor reference return

PLL loop capacitor. External loop capacitor for the SS PHY PLL. The value of the loop capacitor is

CEXT1

PT

TBD.

PLL loop capacitor. External loop capacitor for the USB 2.0 PHY PLL. The value of the loop

CEXT0

PT

capacitor is TBD.

Table 2-3. SATA Signals

TERMINAL

I/O

DESCRIPTION

NAME

NO.

SATA_TXP

O

Serial ATA transmitter differential pair (positive)

SATA_TXM

O

Serial ATA transmitter differential pair (negative)

SATA_RXP

I

Serial ATA receiver differential pair (positive)

SATA_RXM

I

Serial ATA receiver differential pair (negative)

PLL loop capacitor. External loop capacitor for the SATA PLL. The value of the loop capacitor is

CEXT2

PT

TBD.

10

Overview

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