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Edition 5/05.2001

PSL Series

6...12 A Switching Regulators

Pin allocation

Pin

Electrical determination

Design.

2

R-input (or inhibit input)

R (i)

5

Undervoltage monitor (Option D)

D

8

Output voltage (negative)

Go–

11

Output voltage (negative)

Go–

14

Output voltage (positive)

Vo+

17

Output voltage (positive)

Vo+

20

Input voltage (negative)

Gi–

23

Input voltage (negative)

Gi–

26

Input voltage (positive)

Vi+

29

Input voltage (positive)

Vi+

32

Protective ground (leading pin)

Options

Extended temperature range

–40...71

°C, ambient, operating

-9

Inhibit, TTL input, output(s) enabled if left open

i

Output voltage adjustment

0...108%

R

Additional internal input filter

L

Output voltage adjustment

±8% U

o nom

P

Thyristor crowbar on output

C

Input or output undervoltage monitoring

D/D1

Test sockets for check of output voltage

A

S10007

32 29 26 23 20 17 14 11 8

5 2