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TDA19978AHV Datasheet(PDF) 10 Page - NXP Semiconductors

Part # TDA19978AHV
Description  Quad HDMI 1.3a receiver interface with equalizer (HDTV up to 1080p, up to UXGA for PC formats)
PDF  38 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

TDA19978AHV Datasheet(HTML) 10 Page - NXP Semiconductors

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TDA19978A_3
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 03 — 16 April 2010
10 of 38
NXP Semiconductors
TDA19978A
Quad HDMI 1.3a receiver with digital processing
8.4 Equalizer
The auto-adaptive equalizer automatically measures and selects the settings which
provide the best signal quality for each cable. This improves signal quality and enables
the use of cable lengths up to 25 m (laboratory tested, contact NXP for detailed
information). The equalizer is fully automatic and consequently does not need any
external control.
8.5 Activity detection
The TDA19978A uses activity detection to automatically select the active HDMI input. An
internal, fully programmable, frequency filter controls activity detection. It sees only the
activity on the HDMI inputs with a frequency range between minimal 22.5 MHz and
maximal 205 MHz.
This activity detection can generate an interrupt enabling users to manage each HDMI
input.
8.6 High-bandwidth digital content protection
The HDMI receiver also contains the HDCP decryption function. The keys provided by the
One Time Programmable, non-volatile memory in encrypted format are decrypted and
then stored in the HDCP module. This is particularly suitable for repeater applications.
The TDA19978A controls all HDCP repeater functions based on the HDCP 1.2
specification.
Four DDC-buses HSCLA/HSDAA; HSCLB/HSDAB; HSCLC/HSDAC and HSCLD/HSDAD
are integrated into the HDCP function, one bus for each HDMI input. The DDC-bus
connected to the HDCP block is automatically selected based on the active HDMI input.
The unused inputs are disconnected from the DDC-bus (no acknowledge). No additional
CPU processing is required because the authentication phase and the rekey calculation
are fully managed by the TDA19978A.
8.7 Color depth unpacking
In Deep Color mode, the TDA19978A receives several fragments of a pixel group at the
HDMI link frequency. This block translates the received pixel group into pixels at the pixel
frequency. This operation is fully automatic and does not need any external control.
8.8 Derepeater
The HDMI source uses pixel repetition to increase the transmitted pixel clock for
transmitting video formats at native pixel rates below 25 megapixels per second or to
increase the number of audio sample packets in each line. The derepeater function
discards repeated pixels and divides the clock to reproduce the native video format.
8.9 Upsample
The HDMI source can use YCbCr 4:2:2 pixel encoding which enables the number of bits
allocated per component to be increased up to 12. The upsample function transforms this
12-bit YCbCr 4:2:2 data stream into a 12-bit YCbCr 4:4:4 data stream by repeating or
linearly interpolating the chrominance pixels Cb and Cr.
Upsampling mode is selected using the I2C-bus.



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