CAT9552WI datasheet(10/18 Pages) ONSEMI

10 / 18 page

CAT9552

Write Operations

Data is transmitted to the CAT9552 registers using the

write sequence shown in Figure 6.

If the AI bit from the command byte is set to “1”, the

CAT9552 internal registers can be written sequentially.

After sending data to one register, the next data byte

will be sent to the next register sequentially

addressed.

Read Operations

The CAT9552 registers are read according to the

timing diagrams shown in Figure 7 and Figure 8. Data

from the register, defined by the command byte, will

be sent serially on the SDA line.

After the first byte is read, additional data bytes may

be read when the auto-increment flag, AI, is set. The

additional data byte will reflect the data read from the

next register sequentially addressed by the (B3, B2,

B1, B0) bits of the command byte.

When reading Input Port Registers (Figure 8), data is

clocked into the register on the failing edge of the

acknowledge clock pulse. The transfer is stopped

when the master will not acknowledge the data byte

received and issue the STOP condition.

LED Pins Used as General Purpose I/O

Any LED pins not used to drive LEDs can be used as

general purpose input/output, GPIO.

When used as input, the user should program the

corresponding LED pin to Hi-Z (“01” for the LSx

Input Register according to the sequence shown in

Figure 8.

For use as a logic output, an external pull-up resistor

should be connected to the pin. The value of the pull-

up resistor is calculated according to the DC operating

characteristics. To set the output high, the user has to

program the output Hi-Z writing “01” into the

corresponding LED Selector (LSx) register bits. The

output pin is set low when the output is programmed

low through the LSx register bits (“00” in LSx register

bits).

GPIO can also be used as PWM outputs by setting the

LED Selector (LSx) register to “10” or “11” to output

either

the

BLINK0

BLINK1

waveform.

SCL

WRITE TO

DATA OUT

FROM PORT

SDA

Slave Address

Data To Register 1

Start Condition

R/W Acknowledge

From Slave

Acknowledge

From Slave

Acknowledge

From Slave

Command Byte

1.0

Data To Register 2

A2 A1 A0

tpv

AI B3 B2 B1 B0

DAT

Figure 6. Write to Register Timing Diagram

Figure 7. Read from Register Timing Diagram

A2 A1 A0

COMMAND BYTE

Acknowledge

From Slave

Acknowledge

From Slave

Acknowledge

From Slave

Acknowledge

From Master

DATA

R/W

First Byte

Last Byte

No Acknowledge

From Master

Slave Address

Data From Register

Slave Address

MSB

LSB

MSB

LSB

Note:

Transfer can be stopped at any time by a STOP condition.

R/W

At This Moment Master-Transmitter

Becomes Master-receiver and

Slave-Receiver Becomes

Slave-Transmitter

Auto-increment

If Al = 1

Doc. No. MD-9005 Rev D

Characteristics subject to change without notice

CAT9552WI Datasheet(PDF) 10 Page - ON Semiconductor

CAT9552WI Datasheet(HTML) 10 Page - ON Semiconductor

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18

Datasheet Download

Link URL