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PCF8531 Datasheet(PDF) 20 Page - NXP Semiconductors |
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PCF8531 Datasheet(HTML) 20 Page - NXP Semiconductors |
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20 / 51 page ![]() PCF8531 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 05 — 10 August 2010 20 of 51 NXP Semiconductors PCF8531 34 x 128 pixel matrix driver 9. Instructions Only two PCF8531 registers, the instruction register and the data register can be directly controlled by the MPU. Before internal operation, control information is stored temporarily in these registers to allow interfacing to various types of MPUs which operate at different speeds or to allow interfacing to peripheral control ICs. The PCF8531 operation is controlled by the instructions given in Table 11. Instructions are of four types: • Those that define PCF8531 functions e.g. display configuration, etc. • Those that set internal RAM addresses • Those that perform data transfer to/from the internal RAM • Others In normal mode instructions which perform data transfer to/from the internal RAM are used most frequently. Automatic incrementing by 1 of internal RAM addresses after each data write reduces the MPU program load. 9.1 Reset After reset or internal Power-On Reset (POR) (depending on the application), the LCD driver is set to the following state: • Power-down mode (PD = 1) • Horizontal addressing (V = 0) • Display blank (D = 0; E = 0), no icon mode (IM = 0) • Address counter X[6:0] = 0; Y[2:0] = 0 • Bias system BS[2:0] = 0 • Multiplex rate M[1:0] = 0 (multiplex rate 1:17) • Temperature control mode TC[2:0] = 0 • HV-gen control, HVE = 0 the high voltage (HV) generator is switched off, PRS = 0 and S[1:0] = 0 • VLCD =0V • RAM data is undefined • Command page definition H[1:0] = 0 |
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