SC419 datasheet(14/24 Pages) SEMTECH

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SC419

Smart Power-Save Protection

Active loads may leak current from a higher voltage into

the output. Under light load conditions with power-save

enabled, this can force V

OUT to slowly rise and reach the

over-voltage threshold, resulting in a hard shutdown.

Smart power-save prevents this condition. When the FB

voltage exceeds 10% above nominal (exceeds 550mV),

the device immediately disables power-save and DL drives

high to turn on the low-side MOSFET. This draws current

from V

OUT through the inductor and causes VOUT to fall.

When V

FB drops back to the 500mV trip point, a normal TON

switching cycle begins. This method prevents a hard OVP

shutdown and cycles energy from V

OUT back to VIN. It also

minimizes operating power by avoiding forced conduc-

tion mode operation. Figure 7 shows typical waveforms

for the Smart Power-save feature.

threshold

High-side

Drive (DH)

Low-side

Drive (DL)

VOUT drifts up to due to leakage

current flowing into COUT

DH and DL off

DL turns on when Smart

PSAVE threshold is reached

Smart Power Save

Threshold (550mV)

DL turns off when FB

threshold is reached

Single DH on-time pulse

after DL turn-off

VOUT discharges via inductor

and low-side MOSFET

Normal DL pulse after DH

on-time pulse

Normal VOUT ripple

Figure 7 — Smart Power-Save

Enable Input

The EN input is a logic level input. When EN is low

(grounded), the regulator is off and in its lowest power

state. When EN is low and VDDA is above the VDDA UVLO

threshold, the output soft-discharges into the V

OUT pin

through an internal 15Ω resistor. When EN is a logic high

(>1V) the switching regulator is enabled.

The EN input has internal resistors: a 2MΩ pullup to VDDA,

and a 1MΩ pulldown to AGND. These resistors will nor-

mally cause the EN voltage to be above the logic high trip

point as VDDA reaches the VDDA UVLO threshold. To

prevent undesired or erratic startup, the EN pin should not

be allowed to float as open-circuit.

Current Limit Protection

The SC419 features programmable current limiting, which

is accomplished using the RDSON of the lower MOSFET

for current sensing. The current limit is set by R

ILIM resistor

which connects from the ILIM pin to the drain of the low-

side MOSFET. When the low-side MOSFET is on, an internal

10μA current flows from the ILIM pin and through the R

ILIM

resistor, creating a voltage drop across the resistor. While

the low-side MOSFET is on, the inductor current flows

through it and creates a voltage across the RDS

(ON). The

voltage across the MOSFET is negative with respect to

PGND. If this MOSFET voltage drop exceeds the voltage

across R

ILIM, the voltage at the ILIM pin will be negative and

current limit will activate. The current limit then keeps the

low-side MOSFET on, preventing another high-side on-

time until the current in the low-side MOSFET reduces

enough to bring the voltage at the ILIM pin back up to

zero. This method regulates the inductor valley current at

the level shown by I

LIM in Figure 8.

Time

IPEAK

ILOAD

ILIM

Figure 8 — Valley Current Limit

Applications Information (continued)

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