6-17
RF2608
Rev B3 010720
6
Application Schematic
Pin
Function
Description
Interface Schematic
1IF+
Balanced IF input pin. This pin is internally DC-biased and should be
DC blocked if connected to a device with a DC level present. For single-
ended input operation, one pin is used as an input and the other IF
input is AC coupled to ground. The balanced, as well as single-ended,
input impedance is 265
Ω. The IF input should be used differentially
when the part is used as a BPSK modulator.
2IF-
Same as pin 1, except complementary input.
See pin 1.
3GND
Ground connection. For best performance, keep traces physically short
and connect immediately to ground plane.
4LO BYPASS Bypass connection for the LO. A capacitor of 100pF to ground should
be connected to this pin
5LO
Balanced LO input pin. This pin is internally DC-biased and should be
DC-blocked if connected to a device with a DC level present. For single-
ended input operation, one pin is used as an input and the other LO
input is AC-coupled to ground. The balanced, as well single-ended,
input impedance is 50
Ω.
See pin 4.
6GND
Same as pin 3.
7VCC
Supply voltage pin. External bypassing is required. External RF, LO,
and IF bypassing is required. The trace length between the pin and the
bypass capacitors should be minimized. The ground side of the bypass
capacitors should connect immediately to ground plane.
8RF OUT
RF output pin. This pin is internally DC-blocked. The output impedance
is 50
Ω.
BIAS
IF-
IF+
BIAS
LO
BYPASS
LO
RF OUT
1
2
3
4
5
6
7
8
1nF
IF+
1nF
IF-
100 pF
100 pF
LO
RF OUT
100 pF
100 nF
V
CC
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