KT8554B/7B

1 CHIP CODECS

PIN DESCRIPTION

Pin No

Symbol

Description

1

V

BB

V

2

GNDA

Analog ground.

3

VF

Analog output of the receive power Amp.

4

V

CC

V

5

FS

R

Receive frame sync pulse. 8KHz pulse train.

6

D

R

PCM data input.

7

Logic input which selects either 1.536MHz/1.544MHz or 2.048MHz for master

clock in normal operation and BCLK

Alternately direct clock input available, very from 64KHz to 2.048MHz.

8

When MCLK

Normally connected continusously low, MCLK

Alternately direct 1.536MHz/1.544MHz or 2.048MHz clock input available.

9

MCLK

X

Must be1.536MHz/1.544MHz or 2.048MHz.

May be vary from 64KHz to 2.048MHz but BCLK

in normal operation.

11

D

X

PCM data output.

12

FS

X

TX frame sync pulse. 8KHz pulse train.

13

TS

X

Changed from high to low during the encoder timeslot. Open drain output.

Analog output of the TX input amplifier.

Used to set gain through external resistor.

15

VF

-

Inverting input stage of the TX analog signal.

16

VF

+

Non-inverting input stage of the TX analog signal.

Characteristic

Symbol

Value

Unit

Positive Supply Voltage

V

CC

7

V

Negative Supply Voltage

V

BB

- 7

V

Voltage at Any Analog Input or Output

V

I (A)

V

- 0.3

V

Voltage at Any Digital Input or Output

V

l (D)

V

V

Operating Temperature Range

Ta

- 25 to + 125

Storage Temperature Range

T

STG

- 65 to + 150

Lead Temperature (Soldering, 10 secs)

T

LEAD

300

10

BCLK

X

BCLK

CLKSEL

MCLK

PDN

GS

X

14