MAX11209 datasheet(21/27 Pages) MAXIM

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18-Bit, Single-Channel, Ultra-Low-Power, Delta-

Sigma ADCs with Programmable Gain and GPIO

DATA: Data Register

The data register is a 24-bit read-only register. Any attempt to write data to the data register has no effect. The data

read from this register is clocked out MSB first. The data register holds the conversion result. D17 is the MSB, and D0

is the LSB. The result is stored in a format according to the FORMAT bit in the CTRL1 register.

The data format while in unipolar mode is always straight binary. In straight binary format, the most negative value is

0x00000 (VAINP - VAINN = 0V), the midscale value is 0x20000 (VAINP - VAINN = VREF/2), and the most positive value

is 0x3FFFF (VAINP - VAINN = VREF).

In bipolar mode, if the FORMAT bit = 1, then the data format is offset binary. If the FORMAT bit = 0, then the data

format is two’s complement. In two’s complement the negative full-scale value is 0x20000 (VAINP - VAINN = -VREF), the

midscale is 0x00000 (VAINP - VAINN = 0V), and the positive full scale is 0x1FFFF (VAINP - VAINN = VREF). Any input

exceeding the available input range is limited to the minimum or maximum data value.

Table 15. DATA Register (Read Only)

Table 16a. Output Data Format for the Unipolar Input Range

BIT

D17

D16

D15

D14

D13

D12

D11

D10

DEFAULT

BIT

DEFAULT

BIT

DEFAULT

INPUT VOLTAGE

VAINP - VAINN

DIGITAL OUTPUT CODE FOR UNIPOLAR RANGE

STRAIGHT BINARY FORMAT

≥ VREF

0x3FFFF

0x00001

0x00000

REF

−

REF





× −







− 

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