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SST25WF080 Datasheet(PDF) 14 Page - Silicon Storage Technology, Inc |
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SST25WF080 Datasheet(HTML) 14 Page - Silicon Storage Technology, Inc |
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14 / 29 page ![]() 14 Advance Information 8Mbit 1.8V SPI Serial Flash SST25WF080 ©2010 Silicon Storage Technology, Inc. S71203-03-000 04/10 Sector-Erase The Sector-Erase instruction clears all bits in the selected 4 KByte sector to FFH. A Sector-Erase instruction applied to a protected memory area will be ignored. Prior to any Write operation, the Write-Enable (WREN) instruction must be executed. CE# must remain active low for the duration of any command sequence. The Sector-Erase instruction is initiated by executing an 8-bit command, 20H, followed by address bits [A23-A0]. Address bits [AMS-A12] (AMS =Most Significant address) are used to determine the sector address (SAX), remaining address bits can be VIL or VIH. CE# must be driven high before the instruction is executed. The user may poll the Busy bit in the software status regis- ter or wait TSE for the completion of the internal self-timed Sector-Erase cycle. See Figure 14 for the Sector-Erase sequence. FIGURE 14: Sector-Erase Sequence 32-KByte Block-Erase The Block-Erase instruction clears all bits in the selected 32 KByte block to FFH. A Block-Erase instruction applied to a protected memory area is ignored. Prior to any Write oper- ation, the Write-Enable (WREN) instruction must be exe- cuted. CE# must remain active low for the duration of any command sequence. The Block-Erase instruction is initi- ated by executing an 8-bit command, 52H, followed by address bits [A23-A0]. Address bits [AMS-A15] (AMS =Most Significant Address) are used to determine block address (BAX), remaining address bits can be VIL or VIH. CE# must be driven high before the instruction is executed. Poll the Busy bit in the software status register or wait TBE for the completion of the internal self-timed Block-Erase. See Fig- ure 15 for the Block-Erase sequences. FIGURE 15: 32-KByte Block-Erase Sequence CE# SO SI SCK ADD. 01 2 3 4 5 6 7 8 ADD. ADD. 20 HIGH IMPEDANCE 15 16 23 24 31 MODE 0 MODE 3 1203 F13.0 MSB MSB CE# SO SI SCK ADDR 01 2 3 4 5 6 7 8 ADDR ADDR 52 HIGH IMPEDANCE 15 16 23 24 31 MODE 0 MODE 3 1203 F14.0 MSB MSB |
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