Electronic Components Datasheet Search
  English  ▼

X  

Preview PDF HTML

SST25WF020 Datasheet(PDF) 3 Page - Silicon Storage Technology, Inc

Part # SST25WF020
Description  512 Kbit / 1 Mbit / 2 Mbit / 4Mbit 1.8V SPI Serial Flash
PDF  32 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  SST [Silicon Storage Technology, Inc]
Direct Link  http://www.sst.com/
Logo SST - Silicon Storage Technology, Inc

SST25WF020 Datasheet(HTML) 3 Page - Silicon Storage Technology, Inc

  SST25WF020 Datasheet HTML 1Page - Silicon Storage Technology, Inc SST25WF020 Datasheet HTML 2Page - Silicon Storage Technology, Inc SST25WF020 Datasheet HTML 3Page - Silicon Storage Technology, Inc SST25WF020 Datasheet HTML 4Page - Silicon Storage Technology, Inc SST25WF020 Datasheet HTML 5Page - Silicon Storage Technology, Inc SST25WF020 Datasheet HTML 6Page - Silicon Storage Technology, Inc SST25WF020 Datasheet HTML 7Page - Silicon Storage Technology, Inc SST25WF020 Datasheet HTML 8Page - Silicon Storage Technology, Inc SST25WF020 Datasheet HTML 9Page - Silicon Storage Technology, Inc Next Button
Zoom Inzoom in Zoom Outzoom out
 3 / 32 page
background image
Data Sheet
512 Kbit / 1 Mbit / 2 Mbit / 4 Mbit 1.8V SPI Serial Flash
SST25WF512 / SST25WF010 / SST25WF020 / SST25WF040
3
©2009 Silicon Storage Technology, Inc.
S71328-08-000
11/09
PIN DESCRIPTION
FIGURE 2: Pin Assignment for 8-Lead SOIC and 8-Contact WSON
TABLE
1: Pin Description
Symbol
Pin Name
Functions
SCK
Serial Clock
To provide the timing of the serial interface.
Commands, addresses, or input data are latched on the rising edge of the clock input,
while output data is shifted out on the falling edge of the clock input.
SI
Serial Data Input
To transfer commands, addresses, or data serially into the device.
Inputs are latched on the rising edge of the serial clock.
SO
Serial Data Output
To transfer data serially out of the device.
Data is shifted out on the falling edge of the serial clock.
Flash busy status pin in AAI mode if SO is configured as a hardware RY/BY# pin. See
“End-of-Write Detection” on page 14 for more information.
CE#
Chip Enable
The device is enabled by a high to low transition on CE#. CE# must remain low for the
duration of any command sequence.
WP#
Write Protect
The Write Protect (WP#) pin is used to enable/disable BPL bit in the status register.
RST#/HOLD#
Reset
To reset the operation of the device and the internal logic. The device powers on with
RST# pin functionality as default.
Hold
To temporarily stop serial communication with SPI Flash memory while device is
selected. This is selected by an instruction sequence which is detailed in “Reset/Hold
Mode” on page 5.
VDD
Power Supply
To provide power supply voltage: 1.65-1.95V for SST25WF512/010/020/040
VSS
Ground
T1.0 1328
1
2
3
4
8
7
6
5
CE#
SO
WP#
VSS
VDD
RST#/HOLD#
SCK
SI
Top View
1328.25WF 08-soic-P0.0
1
2
3
4
8
7
6
5
CE#
SO
WP#
VSS
Top View
VDD
RST#/HOLD#
SCK
SI
1328 08-wson P2.0
8-Lead SOIC
8-Contact WSON



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com