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DAC1280 Datasheet(PDF) 16 Page - Texas Instruments |
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DAC1280 Datasheet(HTML) 16 Page - Texas Instruments |
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16 / 24 page ![]() Time (50 s/div) m LARGE-SIGNAL STEP RESPONSE V OUT Input Step 125 120 115 110 105 100 95 -36 -30 -24 -18 -12 -6 0 Gain (dB) SNR vs OUTPUT AMPLITUDE R = 2kW I/V R = 1kW I/V R = 500W I/V 0 10 20 30 40 50 60 - - - - - - 0 5 10 15 20 25 30 35 40 45 50 Output Frequency (kHz) CLK = 4.096MHz Excludes I/V Filter Rolloff OUTPUT FREQUENCY RESPONSE DAC1280 SBAS432A – APRIL 2010 – REVISED SEPTEMBER 2010 www.ti.com If desired, SNR can be improved by decreasing the settling, the I/V filter network is also settling. The 2k Ω I/V feedback resistors and then applying suggested I/V RC components (R = 2k Ω, C = 1nF) correspondingly higher DAC1280 gains. Decreasing result in an I/V time constant of approximately 2ms. the resistor values results in a decrease of the Figure 32 shows the composite step response of the maximum output amplitude as shown in Figure 31, circuit in Figure 35. SNR versus output amplitude for I/V resistor values of 2k Ω, 1kΩ, and 500Ω. If decreasing the I/V feedback resistor, increase the I/V capacitor proportionally to maintain the same low-pass corner frequency. Figure 32. DAC1280 Large-Signal Step Response (Noise Removed for Clarity) Frequency Response Figure 31. SNR vs Output Amplitude The DAC1280 low-pass filters the bitstream input, resulting in a sinc2 frequency response profile with the first notch (zero) located at fCLK/160 (25.6kHz with DC Noise CLK = 4.096MHz). However, the aspect of noise shaping of the digital modulator may result in rising DC noise is measured by the ADS1282 with the noise versus frequency. This rising noise may limit circuit configuration of Figure 35. The measurement the usable bandwidth to less than the DAC inherent bandwidth is 413Hz and the ADC is set to a bandwidth. Figure 33 illustrates the DAC1280 complementing gain. The measurement is taken with frequency response. a 50% 1s density input that results in a 0V differential signal output. DC noise is the standard deviation (RMS, referred to output). Total Harmonic Distortion (THD) The DAC1280 achieves excellent THD performance. THD was characterized using the circuit shown in Figure 35 and the ADS1282 with complementary ADC gain settings for each DAC gain. Note that a low-distortion op amp for current-to-voltage conversion (such as the OPA211) is essential in order to achieve rated performance. Settling Time The settling time of the DAC1280 resulting from a step input change consists of the DAC1280 settling time and the I/V filter settling time. Other filter components used in the DAC signal path may also Figure 33. Output Frequency Response add to the settling time. When a step input is applied to TDATA, the DAC output begins to change. The DAC completely settles in 78ms (CLK = 4.096MHz). As the DAC output is 16 Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated Product Folder Link(s): DAC1280 |
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