MB90F482BPF datasheet(70/124 Pages) FUJITSU

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MB90480B/485B Series

DS07-13722-11E

(3) Clock Feed Map

X0A

X1A

HCLK

MCLK

UART0

CPU,

μDMAC

SCLK

PCLK

PPG0, PPG1

PPG2, PPG3

PPG4, PPG5

TIN0

TOT0

SCK0, SIN0

SOT0

SCK1, SCK2

SOT1, SOT2

OUT0, OUT1, OUT2,

IN0, IN1

AN0 to AN7, ADTG

CS0, CS1,

FRCK

IRQ0 to IRQ7

SIN1, SIN2

AIN0, AIN1

BIN0, BIN1

ZIN0, ZIN1

CS2, CS3

OUT3, OUT4, OUT5

Watchdog timer

Oscillator

stabilization

wait control

Timebase

timer

PLL multiplier

circuit

Clock

selector

pins

× 4

× 2

Watch timer

Sub clock

generator

circuit

System clock

generator

circuit

8/16-bit PPG

timer 0

8/16-bit PPG

timer 1

8/16-bit PPG

timer 2

16-bit reload

timer 0

Chip select

16-bit output

compare

16-bit free-run

timer

16-bit input

capture

10-bit A/D

converter

pins

HCLK : Oscillator clock

MCLK : Main clock

SCLK : Sub clock

PCLK : PLL clock

: Machine clock

Peripheral functions

Clock generator module

pins

Extended I/O

serial interface,

2 channels

8/16-bit

up/down counter

External interrupt

MB90F482BPF Datasheet(PDF) 70 Page - fujitsu semiconductor

MB90F482BPF Datasheet(HTML) 70 Page - fujitsu semiconductor

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