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R28 Datasheet(PDF) 48 Page - Renesas Technology Corp |
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R28 Datasheet(HTML) 48 Page - Renesas Technology Corp |
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48 / 473 page  R8C/28 Group, R8C/29 Group 5. Resets Rev.2.10 Sep 26, 2008 Page 29 of 441 REJ09B0279-0210 Figure 5.9 Example of Power-On Reset Circuit and Operation (J, K version) RESET VCC 4.7 k Ω (reference) NOTES: 1. When using the voltage monitor 1 digital filter, ensure VCC is 2.0 V or higher during the sampling time. 2. The sampling clock can be selected. Refer to 6. Voltage Detection Circuit for details. 3. Vdet1 indicates the voltage detection level of the voltage detection 1 circuit. Refer to 6. Voltage Detection Circuit for details. 4. Refer to 20. Electrical Characteristics. 5. To use the power-on reset function, enable voltage monitor 1 reset by setting the LVD1ON bit in the OFS register to 0, the VW1C0 and VW1C6 bits in the VW1C register to 1 respectively, and the VCA26 bit in the VCA2 register to 1. Vdet1(3) Vpor1 Internal reset signal (“L” valid) tw(por1) Sampling time(1, 2) Vdet1(3) Vpor2 × 32 1 fOCO-S × 32 1 fOCO-S 2.0 V trth trth External power VCC td(Vdet1-A) |
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