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R29 Datasheet(PDF) 120 Page - Renesas Technology Corp |
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R29 Datasheet(HTML) 120 Page - Renesas Technology Corp |
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120 / 473 page ![]() R8C/28 Group, R8C/29 Group 10. Clock Generation Circuit Rev.2.10 Sep 26, 2008 Page 101 of 441 REJ09B0279-0210 10.7 Notes on Clock Generation Circuit 10.7.1 Stop Mode When entering stop mode, set the FMR01 bit in the FMR0 register to 0 (CPU rewrite mode disabled) and the CM10 bit in the CM1 register to 1 (stop mode). An instruction queue pre-reads 4 bytes from the instruction which sets the CM10 bit to 1 (stop mode) and the program stops. Insert at least 4 NOP instructions following the JMP.B instruction after the instruction which sets the CM10 bit to 1. • Program example to enter stop mode BCLR 1,FMR0 ; CPU rewrite mode disabled BSET 0,PRCR ; Protect disabled FSET I ; Enable interrupt BSET 0,CM1 ; Stop mode JMP.B LABEL_001 LABEL_001 : NOP NOP NOP NOP 10.7.2 Wait Mode When entering wait mode, set the FMR01 bit in the FMR0 register to 0 (CPU rewrite mode disabled) and execute the WAIT instruction. An instruction queue pre-reads 4 bytes from the WAIT instruction and the program stops. Insert at least 4 NOP instructions after the WAIT instruction. • Program example to execute the WAIT instruction BCLR 1,FMR0 ; CPU rewrite mode disabled FSET I ; Enable interrupt WAIT ; Wait mode NOP NOP NOP NOP 10.7.3 Oscillation Stop Detection Function Since the oscillation stop detection function cannot be used if the XIN clock frequency is 2 MHz or below, set bits OCD1 to OCD0 to 00b. 10.7.4 Oscillation Circuit Constants Ask the manufacturer of the oscillator to specify the best oscillation circuit constants for your system. To use this MCU with supply voltage below VCC = 2.7 V, it is recommended to set the CM11 bit in the CM1 register to 1 (on-chip feedback resistor disabled), the CM15 bit to 1 (high drive capacity), and connect the feedback resistor to the chip externally. |
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