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R29 Datasheet(PDF) 119 Page - Renesas Technology Corp |
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R29 Datasheet(HTML) 119 Page - Renesas Technology Corp |
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119 / 473 page  R8C/28 Group, R8C/29 Group 10. Clock Generation Circuit Rev.2.10 Sep 26, 2008 Page 100 of 441 REJ09B0279-0210 Figure 10.20 Example of Determining Interrupt Source for Oscillation Stop Detection, Watchdog Timer, Voltage Monitor 1, or Voltage Monitor 2 Interrupt (J, K Version) Interrupt sources judgement OCD3 = 1 ? (XIN clock stopped) OCD1 = 1 (oscillation stop detection interrupt enabled) and OCD2 = 1 (on-chip oscillator clock selected as system clock) ? VW2C3 = 1 ? (Watchdog timer underflow) To oscillation stop detection interrupt routine To voltage monitor 2 interrupt routine To watchdog timer interrupt routine NO YES NO YES NO YES NOTE: 1. This disables multiple oscillation stop detection interrupts. OCD1 to OCD3: Bits in OCD register VW2C3: Bit in VW2C register Set OCD1 bit to 0 (oscillation stop detection interrupt disabled).(1) |
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