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R29 Datasheet(PDF) 115 Page - Renesas Technology Corp |
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R29 Datasheet(HTML) 115 Page - Renesas Technology Corp |
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115 / 473 page ![]() R8C/28 Group, R8C/29 Group 10. Clock Generation Circuit Rev.2.10 Sep 26, 2008 Page 96 of 441 REJ09B0279-0210 Figure 10.17 State Transitions in Power Control Mode (When the CM01 bit in the CM0 register is set to 1 (XCIN clock)) CM10 = 1 CPU operation stops Stop mode Reset Wait mode Low-speed on-chip oscillator mode CM14 = 0 OCD2 = 1 FRA01 = 0 High-speed on-chip oscillator mode OCD2 = 1 FRA00 = 1 FRA01 = 1 Standard operating mode FRA00 = 1 FRA01 = 1 CM14 = 0 FRA01 = 0 All oscillators stop Interrupt WAIT instruction Interrupt CM04: Bit in CM0 register CM14: Bit in CM1 register OCD2: Bit in OCD register FRA00, FRA01: Bits in FRA0 register Low-speed clock mode CM04 = 1 OCD2 = 0 CM14 = 0 OCD2 = 1 FRA01 = 0 CM04 = 1 OCD2 = 0 OCD2 = 1 FRA00 = 1 FRA01 = 1 CM04 = 1 OCD2 = 0 State Transitions in Power Control Mode (When the CM01 bit in the CM0 register is set to 1 (XCIN clock)) (For N, D version only) |
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