Sensors

Freescale Semiconductor

11

MMA690xQ

2.1.5.3

Temperature Fault Flag (TF)

This flag is set if the value reported by the on-chip temperature sensor exceeds specified limits. TF may be cleared by writing

a logic ‘1’ value to the CE bit in DEVCTL, provided that the fault condition is no longer detected.

2.1.5.4

Device Reset Flag (DEVRES)

This flag is set during device initialization. A logic ‘1’ must be written to the CE bit in the Device Control register (DEVCTL) to

clear this bit. Except when Communications Protocol is active, this bit must be explicitly cleared following reset before accelera-

tion results can be read from MMA690xQ.

2.1.6

Counter Register (COUNT)

This read-only register provides the value of a free-running 8-bit counter derived from the primary oscillator. A five-bit prescaler

divides the 4.0 MHz primary oscillator frequency by 32. Thus, the value in the register increases by one count every 8.0

μs, and

the counter rolls over every 2.048 ms.

2.1.7

Acceleration Result Registers

These read-only registers contain acceleration results produced by the DSP. The values in these registers are frozen by either

of two events:

•CAP/HOLD input at logic high level

•CS input at logic low level

Acceleration result registers are provided for each axis. ACC_X11L/ACC_X11H and ACC_Y11L/ACC_Y11H provide 11-bit re-

sults. Updates to ACC_X11L/ACC_X11H and ACC_Y11L/ACC_Y11H are halted upon reading the lower-byte register of either

pair until the upper-byte register is read. There is no requirement to manipulate CAP/HOLD when reading ACC_X11L/ACC_X11H

or ACC_Y11L/ACC_Y11H, however ACC_X11H or ACC_Y11H must be read after reading ACC_X11L or ACC_Y11L, respective-

ly, or further updates to the register pair will not occur.

Sign extension is applied to the upper five bits of ACC_X11H and ACC_Y11H. If an error condition exists, the reserved

value 0 will be read in place of 11-bit acceleration data.

Table 2-8 Counter Register

Location

Bit Function

Address

Register

7

6

5

4

3

2

1

0

$11

COUNT

COUNT[7]

COUNT[6]

COUNT[5]

COUNT[4]

COUNT[3]

COUNT[2]

COUNT[1]

COUNT[0]

Table 2-9. X-Axis Acceleration Result Registers

Location

Bit Function

Address

Register

7

6

5

4

3

2

1

0

$24

ACC_X11L

ACC_X[7]

ACC_X[6]

ACC_X[5]

ACC_X[4]

ACC_X[3]

ACC_X[2]

ACC_X[1]

ACC_X[0]

$25

ACC_X11H

0

0

0

0

0

ACC_X[10]

ACC_X[9]

ACC_X[8]

Table 2-10. Y-Axis Acceleration Result Registers

Location

Bit Function

Address

Register

7

6

5

4

3

2

1

0

$26

ACC_Y11L

ACC_Y[7]

ACC_Y[6]

ACC_Y[5]

ACC_Y[4]

ACC_Y[3]

ACC_Y[2]

ACC_Y[1]

ACC_Y[0]

$27

ACC_Y11H

0

0

0

0

0

ACC_Y[10]

ACC_Y[9]

ACC_Y[8]