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MMA6901K Datasheet(PDF) 19 Page - Freescale Semiconductor, Inc

Part # MMA6901K
Description  High Accuracy Low g Inertial Sensor MEMS Sensing, State Machine ASIC
PDF  36 Pages
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MMA6901K Datasheet(HTML) 19 Page - Freescale Semiconductor, Inc

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Sensors
Freescale Semiconductor
19
MMA690xQ
3.1.2
Exception Priority
Table 3-1 provides a summary of exception conditions and order of priority.
If an offset fault condition is detected simultaneously in both the X- and Y-axes, only the X-axis exception is reported by the
device. Hold condition and self-test exceptions have equal priority; if both exceptions exist simultaneously, both are reported by
the device.
3.2
COMMUNICATIONS PROTOCOL
The Communications Protocol provides 11-bit acceleration data along with enhanced status notification in the event that an
exception condition is detected. All transfers are 16-bits in length, with the intended operation indicated by a two-bit transfer type
code transmitted by the SPI master.
Device response depends upon the transfer type code and the internal state of the device. If no exception condition has been
detected, the device returns register or acceleration data as requested. If an exception condition exists, response depends upon
the requested operation and the exception. Exceptions are divided into four classes: behavioral, reset, transient, and critical. Cer-
tain operations, such as register data write and register pointer write, will not be completed if an exception condition is detected
during the associated SPI transfer. All exception conditions detected by MMA690xQ are listed in Table 3-1. Response to excep-
tions is described below, and summarized in Table 3-3.
If both T1 and T0 are set to a logic ‘1’ state, an invalid axis selection exception will be reported by the device.
3.2.1
Device Response
Device response depends upon exception conditions which may be present at the time the transfer takes place. In case of
multiple exceptions, the exception class of highest priority will determine response.
Table 3-1. Exception Conditions
Condition
Status Bit
Class
SPI Clock Fault, Previous Transfer
—
Transient
DIN Parity Fault, Previous Transfer
—
Transient
Internal Data Error
IDE
Critical Error
Internal Oscillator Fault
—
Critical Error
Device Initialization
DEVINIT
Reset
Device Reset
DEVRES
Reset
Temperature Fault
TF
Critical Error
Invalid Axis Selection
—
Transient
Hold Condition
—
Behavioral
Self-test
—
Behavioral
Table 3-2. Transfer Type Codes
T1
T0
Transfer Type
0
0
Register Operation
0
1
X-axis acceleration data
1
0
Y-axis acceleration data
1
1
Unused



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