ZABG6002

ZABG6002

Document number: DS32078 Rev. 1 - 2

2 of 12

www.diodes.com

May 2010

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A Product Line of

Diodes Incorporated

Device Description

The ZABG series of devices are designed to meet the bias requirements of GaAs and HEMT FETs commonly used

in satellite receiver LNBs with a minimum of external components whilst operating from a minimal voltage supply

and using minimal current.

The ZABG6002 has six FET bias stages that can be user programmed to provide either a two plus four

arrangement of amplifier FET stages or a two plus two arrangement of amplifier FET stages along with two active

mixer FET stages. Programming of the FET bias stage arrangement and the operating currents of each FET group

is achieved by resistors connected to the Rcal1, Rcal2 and RcalM pins, allowing input FETs to be biased for

optimum noise, amplifier FETs for optimum gain and mixer FETs (if used) for optimum conversion gain. Amplifier

FETs can be operated at currents in the range 0 to 15mA and mixer FETs in the range 0.5 to 7.5mA.

Drain voltages of amplifier stages are set at 2.0V and mixer stages at 0.3V. The drain supplies are current limited to

approximately 5% above the operating currents set by their associated Rcal resistors.

As an additional feature the Rcal pins can also be used as logic inputs to disable pairs of FETs as part of a power

management scheme or simply an alternative to LNA switching. Driven to a logic high (>3.0V), the inputs disable

their associated FET bias stages by switching gate feeds to -2.5V and drain feeds open circuit.

Depletion mode FETs require a negative voltage bias supply when operated in grounded source circuits. The

ZABG6002 includes an integrated low noise switched capacitor DC-DC converter generating a regulated output of -

2.5V to allow single supply operation. To aid efficiency and 3.3V systems the ZABG6002 has been design to used

with supply rails of 3.3V to 8V

It is possible to use less than the devices full complement of FET bias controls, unused drain and gate connections

can be left open circuit without affecting operation of the remaining bias circuits.

To protect the external FETs the circuits have been designed to ensure that, under any conditions including power

up/down transients, the gate drive from the bias circuits cannot exceed -3V. Additionally each stage has its own

individual current limiter. Furthermore if the negative rail experiences a fault condition, such as overload or short

circuit, the drain supply to the FETs will shut down avoiding excessive current flow.

The ZABG6002 is available in the 20 pin 4mm x 4mm QFN or QSOP20 package.

Device operating temperature is -40°C to 85°C to suit a wide range of environmental conditions.