7. Output parasitic effect

Parasitism occurs when the voltage on an output pin falls more than –0.7 V below GND1 and GND2. (The –0.7 V

more than 1 V. When parasitism occurs, first speed control will be lost intermittently, and then, if it becomes larger,

the output transistors can be damaged. D1, D2 and D3 are used to prevent through currents, and Schottky diodes with

issue. Although normal forward current diodes can be used for D4, D5 and D6, care must be taken to keep the ground

leads short, as mentioned in item 6 above, to avoid parasitism.

8. External interface pins

• LD pin

Output type: open collector

Breakdown voltage: a maximum current voltage of 30 V

0.10 V to 0.15 V

• FGS pin

Output type: open collector

Breakdown voltage: a maximum current voltage of 30 V

0.12 V to 0.18 V

FGS is the FG amplifier output converted to pulses by a hysteresis comparator (for high speed monitoring).

• Start/stop pin

Input type: PNP transistor base with a 50 k

Ω pull-down resistor to ground

Threshold level (typical): about 2.6 V

Turns off the 4, 5 and 7 V fixed voltage power supplies in steps.

• F/R pin

Input type: PNP transistor base with a 50 k

Ω pull-down resistor to ground

Threshold level (typical): about 2.2 V (high

→ low), about 2.7 V (low → high)

With a hysteresis of about 0.5 V.

F/R switching must be performed when stopped.Continued from preceding page.

9. Fixed voltage power supply temperature characteristics

• 4 V power supply: about –0.5 mV/°C (typical)

• 5 V power supply: about –0.6 mV/°C (typical)

• 7 V power supply: about –2.5 mV/°C (typical)

10. FG amplifier

The FG amplifier gain is set by R1 and R2 to be a gain of G = R2/R1. C4 and C5 determine the FG amplifier’s

frequency characteristics. (R1 and C4 form a high pass filter, and R2 and C5 form a low pass filter.) Since a Schmitt

comparator is connected following the FG amplifier, the FG amplifier’s output must be set to be over 250 mVp-p by

R1, R2, C4 and C5. (It is desirable that the FG output be between 1 to 3 Vp-p during normal motor rotation.)

11. External capacitors

• C3

C3 is required for FGIN+ pin fixed voltage power supply stabilization and for IC internal logic initial reset pulse

generation. Although a low capacitance is acceptable for the power supply stabilization function, a relatively large

capacitance (about 4.7 µF) is required for reset pulse generation. The reset pulse is generated when the FGIN+ pin

goes from 0 V to about 1.3 V. If the reset does not occur, it is possible that LD could go on briefly at start time. If

this phenomenon is not a problem, a value of 0.1 µF can be used for C3. After C3 has been charged to 4 V,

about 10 k

Ω that is connected to ground.

LB1824

No. 4264-7/9