MIC4100 datasheet(16/18 Pages) MIC

16 / 18 page

Micrel, Inc.

MIC4100/1

March 2006

M9999-031506

Vdd

Level

shift

Vss

Vdd

Low-side drive turn-off

current path

High-side drive turn-on

current path

Turn-Off Current Paths

Figure 10

The following circuit guidelines should be adhered to for

optimum circuit performance:

1. The Vcc and HB bypass capacitors must be

placed close to the supply and ground pins. It is

critical that the etch length between the high side

decoupling capacitor (CB) and the HB & HS pins

be minimized to reduce lead inductance.

2. A ground plane should be used to minimize

parasitic inductance and impedance of the return

paths. The MIC4100 is capable of greater than 2A

peak currents and any impedance between the

MIC4100, the decoupling capacitors and the

external MOSFET will degrade the performance of

the driver.

3. Trace out the high di/dt and dv/dt paths, as shown

in Figures 9 and 10 and minimize etch length and

loop area for these connections. Minimizing these

parameters decreases the parasitic inductance

and the radiated EMI generated by fast rise and

fall times.

A typical layout of a synchronous Buck converter power

stage (Figure 11) is shown in Figure 12.

Vdd

Level

shift

Vss

Vin

VDD

High-Side Fet

Low-Side Fet

HS (switch) Node

Cin

MIC4100

Figure 11

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