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MIC4225 Datasheet(PDF) 2 Page - MIC GROUP RECTIFIERS |
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MIC4225 Datasheet(HTML) 2 Page - MIC GROUP RECTIFIERS |
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2 / 20 page ![]() Micrel, Inc. MIC4223/MIC4224/MIC4225 June 2009 2 M9999-061109-A (408) 944-0800 Ordering Information Pin Configuration 8-Pin SOIC (YM) 8-Pin ePAD MSOP (YMME) 8-Pin SOIC (YM) 8-Pin ePAD MSOP (YMME) 8-Pin SOIC (YM) 8-Pin ePAD-MSOP (YMME) Pin Description Part Number Configuration Junction Temp. Range Package Lead Finish MIC4223YM Dual Inverting –40° to +125°C 8-pin SOIC Pb-Free MIC4223YMME Dual Inverting –40° to +125°C 8-pin EPAD-MSOP Pb-Free MIC4224YM Dual Non-inverting –40° to +125°C 8-pin SOIC Pb-Free MIC4224YMME Dual Non-inverting –40° to +125°C 8-pin EPAD-MSOP Pb-Free MIC4225YM Inverting + Non-inverting –40° to +125°C 8-pin SOIC Pb-Free MIC4225YMME Inverting + Non-inverting –40° to +125°C 8-pin EPAD-MSOP Pb-Free Pin Number Pin Name Pin Function 1 ENA Enable pin for output A. TTL/CMOS-compatible logic input. A logic-level high enables the device. An internal pull-up enables the part if pin is open. A logic-level low disables the device and the output will be low regardless of the input state. 2 INA Control Input A: TTL/CMOS-compatible logic input. Connect to VDD or ground if not used and connect ENA to ground to disable driver A. 3 GND Ground 4 INB Control Input B: TTL/CMOS compatible logic input. Connect to VDD or ground if not used and connect ENB to ground to disable driver B. 5 OUTB Output B: Parallel Bipolar/CMOS output. 6 VDD Voltage Supply Input: +4.5V to +18V 7 OUTA Output A: Parallel Bipolar/CMOS output. 8 ENB Enable pin for output B. TTL/CMOS-compatible logic input. A logic-level high enables the device. An internal pull-up enables the part if pin is open. A logic-level low disables the device and the output will be low regardless of the input state. EP GND Exposed thermal pad for ePad MSOP package only (Not available on SOIC-8L package). Connect to ground. Must make a full connection to the ground plane to maximize thermal performance of the package. |
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