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R5F36CAMDFB Datasheet(PDF) 19 Page - Renesas Technology Corp |
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R5F36CAMDFB Datasheet(HTML) 19 Page - Renesas Technology Corp |
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19 / 99 page  R01DS0034EJ0200 Rev.2.00 Page 19 of 95 Feb 07, 2011 M16C/6C Group 3. Address Space 3.3 Accessible Area in Each Mode Areas that can be accessed vary depending on processor mode and the status of each control bit. Figure 3.3 shows the Accessible Area in Each Mode. In single-chip mode, the SFRs, internal RAM, and internal ROM can be accessed. In memory expansion mode, the SFRs, internal RAM, internal ROM, and external areas can be accessed. In microprocessor mode, the SFRs, internal RAM, and external areas can be accessed. Allocate ROM to the fixed vector table from FFFDCh to FFFFFh. Figure 3.3 Accessible Area in Each Mode Notes: 1. Do not access reserved areas. 2. The figure above applies under the following conditions: Single-chip mode and memory expansion mode - The PM10 bit in the PM1 register is 1 (addresses 0E000h to 0FFFFh are used as data flash) - The PRG2C0 bit in the PRG2C register is 0 (program ROM 2 enabled) - The PM13 bit in the PM1 register is 1 (all areas in internal RAM, and the program ROM 1 area from 80000h are usable)re usable). Microprocessor mode - The PM10 bit is 0 (addresses 0E000h to 0FFFFh are used as the CS2 area). - The PRG2C0 bit is 1 (program ROM 2 disabled). 00000h 0D000h 00400h 0D800h 0E000h 10000h 14000h FFFFFh 28000h 27000h 80000h 00000h 0D000h 00400h 0D800h 0E000h 10000h 14000h FFFFFh Single-Chip Mode Memory Expansion Mode 00000h 0D000h 00400h 0D800h FFFFFh 28000h 27000h Microprocessor Mode SFR Internal RAM Reserved area SFR Reserved area Internal ROM (data flash) Internal ROM (program ROM 2) Reserved area Internal ROM (program ROM 1) SFR Internal RAM Reserved area SFR External area Internal ROM (data flash) Internal ROM (program ROM 2) External or reserved area Internal ROM (program ROM 1) External area Reserved area External area SFR Internal RAM Reserved area SFR External area Reserved area External area |
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