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IMX53CEC Datasheet(PDF) 179 Page - Freescale Semiconductor, Inc

Part # IMX53CEC
Description  Applications Processors for Consumer Products
PDF  204 Pages
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

IMX53CEC Datasheet(HTML) 179 Page - Freescale Semiconductor, Inc

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Package Information and Contact Assignments
i.MX53xD Applications Processors for Consumer Products, Rev. 2
Freescale Semiconductor
179
To support eMMC per the JESD209 option, top ball signals per Table 117 are provided. IOMUX mode
ALT2 is invoked for these I/O.
i.MX53 PoP supports 16- and 32-bit LPDDR2-800 per JESD209 with no additional PCB digital signal
connections. No signal cross reference is needed. The designer must ensure that the PCB routes power to
POP_VDD1, POP_VDD2, POP_VDDQ, POP_VDDCA, POP_VACC, and POP_VCCQMM,
POP_VCCMM, and POP_VDDMM. Appropriate discrete components must be employed for POP_ZQ,
DRAM_CALIBRATION, DDR_VREF, and POP_VCCQMM1.
6.3.2.3
PoP 12 x 12 mm, Signal Assignments, Power Rails, and I/O
Table 118 displays an alpha-sorted list of the signal assignments including power rails. The table also
includes out of reset pad state.
Table 117. Additional Top Ball Connections for PoP eMMC
eMMC Signal on
Port eSDHC3
Associated Top Ball
RST
PATA_DA0
CLK
PATA_IORDY
CMD
PATA_RESETB
Table 118. PoP 12 x 12 mm Signal Assignments, Power Rails, and I/O
Contact Name
Power Rail
I/O Buffer
Type
Out of Reset Condition1
Alt.
Mode
Function
Direct
ion
Config./
Value
BOOT_MODE0
AA28
—
NVCC_RESET
LVIO
ALT0
src_BOOT_MODE[0
]
Input
100 K
Ω PD
BOOT_MODE1
AB29
—
NVCC_RESET
LVIO
ALT0
src_BOOT_MODE[1
]
Input
100 K
Ω PD
CKIH1
AC29
—
NVCC_CKIH
ANALOG
ALT0
camp1_CKIH
Input
Analog
CKIH2
AC28
—
NVCC_CKIH
ANALOG
ALT0
camp2_CKIH
Input
Analog
CKIL
G13
—
NVCC_SRTC_POW
ANALOG
—
CKIL
—
—
CSI0_DAT10
R2
—
NVCC_CSI
UHVIO
ALT1
gpio5_GPIO[28]
Input
100 K
Ω PU
CSI0_DAT11
R7
—
NVCC_CSI
UHVIO
ALT1
gpio5_GPIO[29]
Input
100 K
Ω PU
CSI0_DAT12
U1
—
NVCC_CSI
UHVIO
ALT1
gpio5_GPIO[30]
Input
360 K
Ω PD
CSI0_DAT13
R1
—
NVCC_CSI
UHVIO
ALT1
gpio5_GPIO[31]
Input
360 K
Ω PD
CSI0_DAT14
T1
—
NVCC_CSI
UHVIO
ALT1
gpio6_GPIO[0]
Input
360 K
Ω PD
CSI0_DAT15
P1
—
NVCC_CSI
UHVIO
ALT1
gpio6_GPIO[1]
Input
360 K
Ω PD



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